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| author |   Hansen <Hansen.Dsouza@amd.com> | 2021-09-28 16:09:47 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2021-10-19 17:18:59 -0400 |
| commit | 3cf79bb772a4f95770a3b3670474058addb7d14f (patch) | |
| tree | 1efe7ac64f0ab9097da46f25541748e8223546cc /tools/perf/scripts/python | |
| parent | drm/amd/display: Limit display scaling to up to true 4k for DCN 3.1 (diff) | |
| download | wireguard-linux-3cf79bb772a4f95770a3b3670474058addb7d14f.tar.xz wireguard-linux-3cf79bb772a4f95770a3b3670474058addb7d14f.zip | |
drm/amd/display: Fix DP2 SE and LE SYMCLK selection for B0 PHY
Remap phyd32clk to PHYF and PHYG for B0, PHYC and PHYD are unused
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Hansen <Hansen.Dsouza@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions