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author | 2012-04-18 11:12:11 +0100 | |
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committer | 2012-04-18 12:39:57 +0200 | |
commit | 46f0f8d120c4afae53a5670bf3ac80a928340ff3 (patch) | |
tree | 7ba82e0151f2a1620760e3e8a62df0c933e42b13 /tools/perf/util/scripting-engines/trace-event-python.c | |
parent | drm/i915: intel_update_fbc() requires struct_mutex, so no longer atomic (diff) | |
download | wireguard-linux-46f0f8d120c4afae53a5670bf3ac80a928340ff3.tar.xz wireguard-linux-46f0f8d120c4afae53a5670bf3ac80a928340ff3.zip |
drm/i915: Don't set a MBZ bit in gen2/3 MI_FLUSH
On gen2 MI_EXE_FLUSH is actually an AGP flush bit and on gen3 marked as
reserved. On both it is documented as being must-be-zero. So obey the
documentation, and separate the gen2 flush into its own little routine
and share with gen3.
This means that we can rename the existing render_ring_flush() to
reflect the generation from which it first applies and remove the code
for handling earlier generations from it.
v2: Applies to gen3 as well
v3: Make it compile and improve the commit message.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions