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| author |   Ilya Yanok <yanok@emcraft.com> | 2010-10-27 02:02:36 +0200 |
|---|---|---|
| committer |   Kumar Gala <galak@kernel.crashing.org> | 2011-01-12 18:00:29 -0600 |
| commit | fd066e850351e21d1b385cde35fadf66761bc053 (patch) | |
| tree | cadeaa7f470a2bfbc880469877de5e836b5a2e10 /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | powerpc/fsl_rio: Fix non-standard HID1 register access (diff) | |
| download | wireguard-linux-fd066e850351e21d1b385cde35fadf66761bc053.tar.xz wireguard-linux-fd066e850351e21d1b385cde35fadf66761bc053.zip | |
powerpc/mpc8308: fix USB DR controller initialization
MPC8308 has ULPI pin muxing settings in SICRH register, bits 17-18
which is different from both MPC8313 and MPC8315.
Also MPC8308 doesn't have REFSEL, UTMI_PHY_EN and OTG_PORT fields
in the USB DR controller CONTROL register.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Tested-by: Wolfgang Denk <wd@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions