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| author |   Palmer Dabbelt <palmer@sifive.com> | 2018-03-08 13:57:58 -0800 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2018-06-11 09:16:24 -0700 |
| commit | 24a130ccfe58e0ef7907ce63030ad0ff7d7c633b (patch) | |
| tree | 053954e53ff8ffff15cfd815e4327b939f4c6b02 /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | RISC-V: Make our port sparse-clean (diff) | |
| download | wireguard-linux-24a130ccfe58e0ef7907ce63030ad0ff7d7c633b.tar.xz wireguard-linux-24a130ccfe58e0ef7907ce63030ad0ff7d7c633b.zip | |
RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfig
The SBI exists on all RISC-V systems, so there's no reason not to
compile this driver in.
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions