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| author |   Max Filippov <jcmvbkbc@gmail.com> | 2014-01-29 07:53:44 +0400 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2014-02-21 21:33:44 +0400 |
| commit | 2bc2fde63858322a942864bf6cb2d54f5aa33186 (patch) | |
| tree | a2459c8d679d4d3c05f8d0126ae9bbbe16179fd4 /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | xtensa: xtfpga: use common clock framework (diff) | |
| download | wireguard-linux-2bc2fde63858322a942864bf6cb2d54f5aa33186.tar.xz wireguard-linux-2bc2fde63858322a942864bf6cb2d54f5aa33186.zip | |
xtensa: xtfpga: set ethoc clock frequency
Connect xtfpga board ethernet MAC to the clock in the DTS. Set up MAC
base frequency in the platform data in case of build w/o CONFIG_OF.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions