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| author |   Linus Torvalds <torvalds@linux-foundation.org> | 2018-01-29 18:54:56 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-01-29 18:54:56 -0800 |
| commit | 36c289e72a63c3a4fbb14f84e220a2a75a5bf656 (patch) | |
| tree | 0c9d747adafad5f75f9d3828fcf0c53da705b19b /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | Merge branch 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip (diff) | |
| parent | x86/centaur: Mark TSC invariant (diff) | |
| download | wireguard-linux-36c289e72a63c3a4fbb14f84e220a2a75a5bf656.tar.xz wireguard-linux-36c289e72a63c3a4fbb14f84e220a2a75a5bf656.zip | |
Merge branch 'x86-timers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 timer updates from Thomas Gleixner:
"A small set of updates for x86 specific timers:
- Mark TSC invariant on a subset of Centaur CPUs
- Allow TSC calibration without PIT on mobile platforms which lack
legacy devices"
* 'x86-timers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/centaur: Mark TSC invariant
x86/tsc: Introduce early tsc clocksource
x86/time: Unconditionally register legacy timer interrupt
x86/tsc: Allow TSC calibration without PIT
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions