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| author |   Dave Airlie <airlied@redhat.com> | 2013-10-22 07:32:40 +0100 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2013-10-22 07:32:40 +0100 |
| commit | 3bcec5f076688c58436a6c354f5b94eef16469da (patch) | |
| tree | 6e50e1c03d52bffbd17b16dd6b153a428f0b9e7c /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | drm: Pad drm_mode_get_connector to 64-bit boundary (diff) | |
| parent | drm/i915: Disable GGTT PTEs on GEN6+ suspend (diff) | |
| download | wireguard-linux-3bcec5f076688c58436a6c354f5b94eef16469da.tar.xz wireguard-linux-3bcec5f076688c58436a6c354f5b94eef16469da.zip | |
Merge tag 'drm-intel-fixes-2013-10-21' of git://people.freedesktop.org/~danvet/drm-intel into drm-fixes
Just an lvds clock gating fix and a pte clearing hack for hsw to avoid
memory corruption when hibernating - something doesn't seem to switch off
properly, we're still investigating.
* tag 'drm-intel-fixes-2013-10-21' of git://people.freedesktop.org/~danvet/drm-intel: (96 commits)
drm/i915: Disable GGTT PTEs on GEN6+ suspend
drm/i915: Make PTE valid encoding optional
drm/i915: disable LVDS clock gating on CPT v2
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions