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authorMaciej W. Rozycki <macro@imgtec.com>2016-01-30 09:08:43 +0000
committerRalf Baechle <ralf@linux-mips.org>2016-04-04 15:25:34 +0200
commit3d50a7fb42992545e45e10b068406546ea699489 (patch)
tree377a54dd0c80f3f287e4463d3ea9577866384cfa /tools/perf/util/scripting-engines/trace-event-python.c
parentMIPS: BMIPS: Fix gisb-arb compatible string for 7435 (diff)
downloadwireguard-linux-3d50a7fb42992545e45e10b068406546ea699489.tar.xz
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MIPS: traps.c: Verify the ISA for microMIPS RDHWR emulation
Make sure it's the microMIPS rather than MIPS16 ISA before emulating microMIPS RDHWR. Mostly needed as an optimisation for configurations where `cpu_has_mmips' is hardcoded to 0 and also a good measure in case we add further microMIPS instructions to emulate in the future, as the corresponding MIPS16 encoding is ADDIUSP, not supposed to trap. Signed-off-by: Maciej W. Rozycki <macro@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/12282/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
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