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authorWang Xiaoyin <hw.wangxiaoyin@hisilicon.com>2017-03-30 14:48:02 +0800
committerWei Xu <xuwei5@hisilicon.com>2017-04-10 23:34:23 +0800
commit5a7e4774fd91b1c934806ea89b3ec6cc74c54159 (patch)
treee766d9fd2fbc89aa4f9f232de7a13064736dbc19 /tools/perf/util/scripting-engines/trace-event-python.c
parentarm64: dts: hisi: enable the NIC and SAS for the hip07-d05 board (diff)
downloadwireguard-linux-5a7e4774fd91b1c934806ea89b3ec6cc74c54159.tar.xz
wireguard-linux-5a7e4774fd91b1c934806ea89b3ec6cc74c54159.zip
arm64: dts: hisi: add drive strength levels of the pins for Hi3660 SoC
Extend drive strength levels of the pins for Hi3660 Soc. Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
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