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author | 2013-08-16 12:55:56 +0100 | |
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committer | 2013-08-20 00:11:50 +0100 | |
commit | 7cb3be0a27805c625ff7cce20c53c926d9483243 (patch) | |
tree | 02c3a65d6934c6e90353d3ab05ee7056f114179f /tools/perf/util/scripting-engines/trace-event-python.c | |
parent | ARM: 7810/1: perf: Fix array out of bounds access in armpmu_map_hw_event() (diff) | |
download | wireguard-linux-7cb3be0a27805c625ff7cce20c53c926d9483243.tar.xz wireguard-linux-7cb3be0a27805c625ff7cce20c53c926d9483243.zip |
ARM: 7819/1: fiq: Cast the first argument of flush_icache_range()
Commit 2ba85e7af4 (ARM: Fix FIQ code on VIVT CPUs) causes the following build warning:
arch/arm/kernel/fiq.c:92:3: warning: passing argument 1 of 'cpu_cache.coherent_kern_range' makes integer from pointer without a cast [enabled by default]
Cast it as '(unsigned long)base' to avoid the warning.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions