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| author |   Wei Xu <xuwei5@hisilicon.com> | 2017-03-28 23:40:40 +0800 |
|---|---|---|
| committer | Wei Xu <xuwei5@hisilicon.com> | 2017-04-08 13:43:45 +0800 |
| commit | 86d67897f937000dd13ca9e81e3130adecdf45a0 (patch) | |
| tree | 1d35511459b430b6011f0e6b8cd66470581a2cca /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | arm64: dts: hisi: add RoCE nodes for the hip07 SoC (diff) | |
| download | wireguard-linux-86d67897f937000dd13ca9e81e3130adecdf45a0.tar.xz wireguard-linux-86d67897f937000dd13ca9e81e3130adecdf45a0.zip | |
arm64: dts: hisi: add SAS nodes for the hip07 SoC
Add 3 SAS host controller nodes and the dependent subctrl node
to enable the SAS and SATA function for the hip07 SoC.
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions