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| author |   Giuseppe CAVALLARO <peppe.cavallaro@st.com> | 2016-04-01 09:07:14 +0200 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2016-04-01 14:38:58 -0400 |
| commit | a00e3ab64be2e482bd25fe30bdc9bfa6e2b0cf1c (patch) | |
| tree | 2c28bf43b65edfc75c7ff4f41a621c0b45389040 /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | net: mvneta: use cache_line_size() to get cacheline size (diff) | |
| download | wireguard-linux-a00e3ab64be2e482bd25fe30bdc9bfa6e2b0cf1c.tar.xz wireguard-linux-a00e3ab64be2e482bd25fe30bdc9bfa6e2b0cf1c.zip | |
stmmac: fix TX normal DESC
This patch fixs a regression raised when test on chips that use
the normal descriptor layout. In fact, no len bits were set for
the TDES1 and no OWN bit inside the TDES0.
Signed-off-by: Giuseppe CAVALLARO <peppe.cavallaro@st.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Cc: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions