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author | 2024-07-16 11:24:16 -0700 | |
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committer | 2024-07-16 11:24:16 -0700 | |
commit | bc060e6bb7028a1780f1fe652d2546ee7058e065 (patch) | |
tree | 73303bdfc8850c322d102d58b4aa41c6a6d27f7a /tools/perf/util/scripting-engines/trace-event-python.c | |
parent | Merge branches 'clk-stm', 'clk-cleanup', 'clk-kunit' and 'clk-mediatek' into clk-next (diff) | |
parent | Merge tag 'renesas-clk-for-v6.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas (diff) | |
parent | Merge tag 'clk-meson-v6.11-1' of https://github.com/BayLibre/clk-meson into clk-amlogic (diff) | |
parent | clk: sunxi-ng r40: Constify struct regmap_config (diff) | |
parent | Merge tag 'samsung-clk-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into clk-samsung (diff) | |
download | wireguard-linux-bc060e6bb7028a1780f1fe652d2546ee7058e065.tar.xz wireguard-linux-bc060e6bb7028a1780f1fe652d2546ee7058e065.zip |
Merge branches 'clk-renesas', 'clk-amlogic', 'clk-allwinner' and 'clk-samsung' into clk-next
* clk-renesas:
clk: renesas: r9a08g045: Add clock, reset and power domain support for I2C
clk: renesas: r8a779h0: Add Audio clocks
clk: renesas: r9a08g045: Add clock, reset and power domain support for the VBATTB IP
dt-bindings: clock: rcar-gen2: Remove obsolete header files
dt-bindings: clock: r8a7779: Remove duplicate newline
clk: renesas: Drop "Renesas" from individual driver descriptions
clk: renesas: r8a779h0: Fix PLL2/PLL4 multipliers in comments
clk: renesas: r8a779h0: Add VIN clocks
dt-bindings: clock: renesas,rzg2l-cpg: Update description for #reset-cells
clk: renesas: rcar-gen2: Use DEFINE_SPINLOCK() for static spinlock
clk: renesas: cpg-lib: Use DEFINE_SPINLOCK() for global spinlock
clk: renesas: r8a77970: Use common cpg_lock
clk: renesas: r8a779h0: Add CSI-2 clocks
clk: renesas: r8a779h0: Add ISPCS clocks
* clk-amlogic:
clk: meson: add missing MODULE_DESCRIPTION() macros
dt-bindings: clock: meson: a1: peripherals: support sys_pll input
dt-bindings: clock: meson: a1: pll: introduce new syspll bindings
clk: meson: add 'NOINIT_ENABLED' flag to eliminate init for enabled PLL
clk: meson: c3: add c3 clock peripherals controller driver
clk: meson: c3: add support for the C3 SoC PLL clock
dt-bindings: clock: add Amlogic C3 peripherals clock controller
dt-bindings: clock: add Amlogic C3 SCMI clock controller support
dt-bindings: clock: add Amlogic C3 PLL clock controller
dt-bindings: clock: meson: Convert axg-audio-clkc to YAML format
clk: meson: s4: fix pwm_j_div parent clock
clk: meson: s4: fix fixed_pll_dco clock
* clk-allwinner:
clk: sunxi-ng r40: Constify struct regmap_config
clk: sunxi-ng: h616: Add clock/reset for GPADC
dt-bindings: clock: sun50i-h616-ccu: Add GPADC clocks
clk: sunxi: Remove unused struct 'gates_data'
clk: sunxi-ng: add missing MODULE_DESCRIPTION() macros
* clk-samsung:
clk: samsung: gs101: mark gout_hsi2_ufs_embd_i_clk_unipro as critical
clk: samsung: Switch to use kmemdup_array()
clk: samsung: exynos-clkout: Remove misleading of_match_table/MODULE_DEVICE_TABLE