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author | 2017-03-16 06:53:19 +0100 | |
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committer | 2017-03-23 17:29:42 +0100 | |
commit | cd2f0d0d403b7eb779fba04ea9664faa3b625cde (patch) | |
tree | 0e4036223e8c1bd5c36d7ee6443406718d652e7b /tools/perf/util/scripting-engines/trace-event-python.c | |
parent | ARM: dts: mvebu: remove unnecessary PCI range from 98dx3236 (diff) | |
download | wireguard-linux-cd2f0d0d403b7eb779fba04ea9664faa3b625cde.tar.xz wireguard-linux-cd2f0d0d403b7eb779fba04ea9664faa3b625cde.zip |
ARM: dts: mvebu: linksys: enable buffer manager support
Add appropriate properties to devices in the Linksys WRT AC Series for the
mvneta driver to use hardware buffer management.
Also update "soc" ranges property and set the status of bm and bm-bppi
to "okay" (SRAM).
Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions