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| author |   Sohil Mehta <sohil.mehta@intel.com> | 2017-12-20 11:59:26 -0800 |
|---|---|---|
| committer |   Joerg Roedel <jroedel@suse.de> | 2018-01-17 15:02:50 +0100 |
| commit | f1ac10c24efbbcba0f8dae37ee90d45847f5c5af (patch) | |
| tree | dfc517909ee0e7bd723dd37dace984008ba51dab /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | iommu/vt-d: Add a check for 1GB page support (diff) | |
| download | wireguard-linux-f1ac10c24efbbcba0f8dae37ee90d45847f5c5af.tar.xz wireguard-linux-f1ac10c24efbbcba0f8dae37ee90d45847f5c5af.zip | |
iommu/vt-d: Add a check for 5-level paging support
Add a check to verify IOMMU 5-level paging support. If the CPU supports
supports 5-level paging but the IOMMU does not support it then disable
SVM by not allocating PASID tables.
Signed-off-by: Sohil Mehta <sohil.mehta@intel.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions