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authorJohn Garry <john.garry@huawei.com>2021-01-28 20:00:33 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2021-03-04 10:26:32 +0100
commitd2ee0b2070cd3e3e449ab607b47cb84cee290db6 (patch)
treeeacb797d03fd2177f05448fec12490a75acbc8fb /tools
parentperf tools: Fix DSO filtering when not finding a map for a sampled address (diff)
downloadwireguard-linux-d2ee0b2070cd3e3e449ab607b47cb84cee290db6.tar.xz
wireguard-linux-d2ee0b2070cd3e3e449ab607b47cb84cee290db6.zip
perf vendor events arm64: Fix Ampere eMag event typo
[ Upstream commit 2bf797be81fa808f05f1a7a65916619132256a27 ] The "briefdescription" for event 0x35 has a typo - fix it. Fixes: d35c595bf005 ("perf vendor events arm64: Revise core JSON events for eMAG") Signed-off-by: John Garry <john.garry@huawei.com> Acked-by: Will Deacon <will@kernel.org> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Nakamura, Shunsuke/中村 俊介 <nakamura.shun@fujitsu.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linuxarm@openeuler.org Link: https://lore.kernel.org/r/1611835236-34696-2-git-send-email-john.garry@huawei.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'tools')
-rw-r--r--tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json2
1 files changed, 1 insertions, 1 deletions
diff --git a/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json b/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json
index df9201434cb6..b0a10a219b50 100644
--- a/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json
+++ b/tools/perf/pmu-events/arch/arm64/ampere/emag/cache.json
@@ -114,7 +114,7 @@
"PublicDescription": "Level 2 access to instruciton TLB that caused a page table walk. This event counts on any instruciton access which causes L2I_TLB_REFILL to count",
"EventCode": "0x35",
"EventName": "L2I_TLB_ACCESS",
- "BriefDescription": "L2D TLB access"
+ "BriefDescription": "L2I TLB access"
},
{
"PublicDescription": "Branch target buffer misprediction",