diff options
Diffstat (limited to '')
| -rw-r--r-- | Documentation/devicetree/bindings/pwm/adi,axi-pwmgen.yaml | 8 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.yaml | 8 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/pwm/brcm,kona-pwm.yaml | 8 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/pwm/marvell,berlin-pwm.yaml | 44 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/pwm/pwm-berlin.txt | 17 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/pwm/pwm-sprd.txt | 40 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml | 66 | ||||
| -rw-r--r-- | drivers/pwm/pwm-dwc.c | 14 | ||||
| -rw-r--r-- | drivers/pwm/pwm-lpss-pci.c | 9 | ||||
| -rw-r--r-- | drivers/pwm/pwm-stm32-lp.c | 8 | ||||
| -rw-r--r-- | drivers/pwm/pwm-stm32.c | 7 |
11 files changed, 143 insertions, 86 deletions
diff --git a/Documentation/devicetree/bindings/pwm/adi,axi-pwmgen.yaml b/Documentation/devicetree/bindings/pwm/adi,axi-pwmgen.yaml index aa35209f74cf..45e112d0efb4 100644 --- a/Documentation/devicetree/bindings/pwm/adi,axi-pwmgen.yaml +++ b/Documentation/devicetree/bindings/pwm/adi,axi-pwmgen.yaml @@ -41,8 +41,8 @@ unevaluatedProperties: false examples: - | pwm@44b00000 { - compatible = "adi,axi-pwmgen-2.00.a"; - reg = <0x44b00000 0x1000>; - clocks = <&spi_clk>; - #pwm-cells = <3>; + compatible = "adi,axi-pwmgen-2.00.a"; + reg = <0x44b00000 0x1000>; + clocks = <&spi_clk>; + #pwm-cells = <3>; }; diff --git a/Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.yaml b/Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.yaml index 119de3d7f9dd..44548a9da158 100644 --- a/Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.yaml @@ -35,8 +35,8 @@ additionalProperties: false examples: - | pwm: pwm@f0408000 { - compatible = "brcm,bcm7038-pwm"; - reg = <0xf0408000 0x28>; - #pwm-cells = <2>; - clocks = <&upg_fixed>; + compatible = "brcm,bcm7038-pwm"; + reg = <0xf0408000 0x28>; + #pwm-cells = <2>; + clocks = <&upg_fixed>; }; diff --git a/Documentation/devicetree/bindings/pwm/brcm,kona-pwm.yaml b/Documentation/devicetree/bindings/pwm/brcm,kona-pwm.yaml index e86c8053b366..fd785da5d3d7 100644 --- a/Documentation/devicetree/bindings/pwm/brcm,kona-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/brcm,kona-pwm.yaml @@ -43,9 +43,9 @@ examples: #include <dt-bindings/clock/bcm281xx.h> pwm@3e01a000 { - compatible = "brcm,bcm11351-pwm", "brcm,kona-pwm"; - reg = <0x3e01a000 0xcc>; - clocks = <&slave_ccu BCM281XX_SLAVE_CCU_PWM>; - #pwm-cells = <3>; + compatible = "brcm,bcm11351-pwm", "brcm,kona-pwm"; + reg = <0x3e01a000 0xcc>; + clocks = <&slave_ccu BCM281XX_SLAVE_CCU_PWM>; + #pwm-cells = <3>; }; ... diff --git a/Documentation/devicetree/bindings/pwm/marvell,berlin-pwm.yaml b/Documentation/devicetree/bindings/pwm/marvell,berlin-pwm.yaml new file mode 100644 index 000000000000..091fec03df13 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/marvell,berlin-pwm.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/marvell,berlin-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Berlin PWM controller + +maintainers: + - Jisheng Zhang <jszhang@kernel.org> + - Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> + +properties: + compatible: + const: marvell,berlin-pwm + + reg: + maxItems: 1 + + "#pwm-cells": + const: 3 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + +allOf: + - $ref: pwm.yaml# + +unevaluatedProperties: false + +examples: + - | + pwm@f7f20000 { + compatible = "marvell,berlin-pwm"; + reg = <0xf7f20000 0x40>; + clocks = <&chip_clk 12>; + #pwm-cells = <3>; + }; + diff --git a/Documentation/devicetree/bindings/pwm/pwm-berlin.txt b/Documentation/devicetree/bindings/pwm/pwm-berlin.txt deleted file mode 100644 index f01e993a498a..000000000000 --- a/Documentation/devicetree/bindings/pwm/pwm-berlin.txt +++ /dev/null @@ -1,17 +0,0 @@ -Berlin PWM controller - -Required properties: -- compatible: should be "marvell,berlin-pwm" -- reg: physical base address and length of the controller's registers -- clocks: phandle to the input clock -- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of - the cells format. - -Example: - -pwm: pwm@f7f20000 { - compatible = "marvell,berlin-pwm"; - reg = <0xf7f20000 0x40>; - clocks = <&chip_clk CLKID_CFG>; - #pwm-cells = <3>; -} diff --git a/Documentation/devicetree/bindings/pwm/pwm-sprd.txt b/Documentation/devicetree/bindings/pwm/pwm-sprd.txt deleted file mode 100644 index 87b206fd0618..000000000000 --- a/Documentation/devicetree/bindings/pwm/pwm-sprd.txt +++ /dev/null @@ -1,40 +0,0 @@ -Spreadtrum PWM controller - -Spreadtrum SoCs PWM controller provides 4 PWM channels. - -Required properties: -- compatible : Should be "sprd,ums512-pwm". -- reg: Physical base address and length of the controller's registers. -- clocks: The phandle and specifier referencing the controller's clocks. -- clock-names: Should contain following entries: - "pwmn": used to derive the functional clock for PWM channel n (n range: 0 ~ 3). - "enablen": for PWM channel n enable clock (n range: 0 ~ 3). -- #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of - the cells format. - -Optional properties: -- assigned-clocks: Reference to the PWM clock entries. -- assigned-clock-parents: The phandle of the parent clock of PWM clock. - -Example: - pwms: pwm@32260000 { - compatible = "sprd,ums512-pwm"; - reg = <0 0x32260000 0 0x10000>; - clock-names = "pwm0", "enable0", - "pwm1", "enable1", - "pwm2", "enable2", - "pwm3", "enable3"; - clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>, - <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>, - <&aon_clk CLK_PWM2>, <&aonapb_gate CLK_PWM2_EB>, - <&aon_clk CLK_PWM3>, <&aonapb_gate CLK_PWM3_EB>; - assigned-clocks = <&aon_clk CLK_PWM0>, - <&aon_clk CLK_PWM1>, - <&aon_clk CLK_PWM2>, - <&aon_clk CLK_PWM3>; - assigned-clock-parents = <&ext_26m>, - <&ext_26m>, - <&ext_26m>, - <&ext_26m>; - #pwm-cells = <2>; - }; diff --git a/Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml b/Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml new file mode 100644 index 000000000000..c806b6768087 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/sprd,ums512-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Spreadtrum/Unisoc UMS512 PWM Controller + +maintainers: + - Orson Zhai <orsonzhai@gmail.com> + - Baolin Wang <baolin.wang@linux.alibaba.com> + - Chunyan Zhang <zhang.lyra@gmail.com> + +properties: + compatible: + const: sprd,ums512-pwm + + reg: + maxItems: 1 + + clocks: + maxItems: 8 + + clock-names: + items: + - const: pwm0 + - const: enable0 + - const: pwm1 + - const: enable1 + - const: pwm2 + - const: enable2 + - const: pwm3 + - const: enable3 + + '#pwm-cells': + const: 2 + +required: + - compatible + - reg + - clocks + - clock-names + +allOf: + - $ref: pwm.yaml# + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/sprd,ums512-clk.h> + + pwm@32260000 { + compatible = "sprd,ums512-pwm"; + reg = <0x32260000 0x10000>; + clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>, + <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>, + <&aon_clk CLK_PWM2>, <&aonapb_gate CLK_PWM2_EB>, + <&aon_clk CLK_PWM3>, <&aonapb_gate CLK_PWM3_EB>; + clock-names = "pwm0", "enable0", + "pwm1", "enable1", + "pwm2", "enable2", + "pwm3", "enable3"; + #pwm-cells = <2>; + }; +... diff --git a/drivers/pwm/pwm-dwc.c b/drivers/pwm/pwm-dwc.c index fb3eadf6fbc4..b6c16139ce4a 100644 --- a/drivers/pwm/pwm-dwc.c +++ b/drivers/pwm/pwm-dwc.c @@ -66,20 +66,16 @@ static int dwc_pwm_probe(struct pci_dev *pci, const struct pci_device_id *id) pci_set_master(pci); - ret = pcim_iomap_regions(pci, BIT(0), pci_name(pci)); - if (ret) - return dev_err_probe(dev, ret, "Failed to iomap PCI BAR\n"); - info = (const struct dwc_pwm_info *)id->driver_data; ddata = devm_kzalloc(dev, struct_size(ddata, chips, info->nr), GFP_KERNEL); if (!ddata) return -ENOMEM; - /* - * No need to check for pcim_iomap_table() failure, - * pcim_iomap_regions() already does it for us. - */ - ddata->io_base = pcim_iomap_table(pci)[0]; + ddata->io_base = pcim_iomap_region(pci, 0, "pwm-dwc"); + if (IS_ERR(ddata->io_base)) + return dev_err_probe(dev, PTR_ERR(ddata->io_base), + "Failed to request / iomap PCI BAR\n"); + ddata->info = info; for (idx = 0; idx < ddata->info->nr; idx++) { diff --git a/drivers/pwm/pwm-lpss-pci.c b/drivers/pwm/pwm-lpss-pci.c index ddc2a4ca90fd..ae25d9321d75 100644 --- a/drivers/pwm/pwm-lpss-pci.c +++ b/drivers/pwm/pwm-lpss-pci.c @@ -18,6 +18,7 @@ static int pwm_lpss_probe_pci(struct pci_dev *pdev, const struct pci_device_id *id) { const struct pwm_lpss_boardinfo *info; + void __iomem *io_base; struct pwm_chip *chip; int err; @@ -25,12 +26,12 @@ static int pwm_lpss_probe_pci(struct pci_dev *pdev, if (err < 0) return err; - err = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev)); - if (err) - return err; + io_base = pcim_iomap_region(pdev, 0, "pwm-lpss"); + if (IS_ERR(io_base)) + return PTR_ERR(io_base); info = (struct pwm_lpss_boardinfo *)id->driver_data; - chip = devm_pwm_lpss_probe(&pdev->dev, pcim_iomap_table(pdev)[0], info); + chip = devm_pwm_lpss_probe(&pdev->dev, io_base, info); if (IS_ERR(chip)) return PTR_ERR(chip); diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c index 989731256f50..5832dce8ed9d 100644 --- a/drivers/pwm/pwm-stm32-lp.c +++ b/drivers/pwm/pwm-stm32-lp.c @@ -167,8 +167,12 @@ static int stm32_pwm_lp_get_state(struct pwm_chip *chip, regmap_read(priv->regmap, STM32_LPTIM_CR, &val); state->enabled = !!FIELD_GET(STM32_LPTIM_ENABLE, val); /* Keep PWM counter clock refcount in sync with PWM initial state */ - if (state->enabled) - clk_enable(priv->clk); + if (state->enabled) { + int ret = clk_enable(priv->clk); + + if (ret) + return ret; + } regmap_read(priv->regmap, STM32_LPTIM_CFGR, &val); presc = FIELD_GET(STM32_LPTIM_PRESC, val); diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c index 17e591f61efb..a59de4de18b6 100644 --- a/drivers/pwm/pwm-stm32.c +++ b/drivers/pwm/pwm-stm32.c @@ -858,8 +858,11 @@ static int stm32_pwm_probe(struct platform_device *pdev) chip->ops = &stm32pwm_ops; /* Initialize clock refcount to number of enabled PWM channels. */ - for (i = 0; i < num_enabled; i++) - clk_enable(priv->clk); + for (i = 0; i < num_enabled; i++) { + ret = clk_enable(priv->clk); + if (ret) + return ret; + } ret = devm_pwmchip_add(dev, chip); if (ret < 0) |