diff options
Diffstat (limited to '')
| -rw-r--r-- | arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts | 40 | ||||
| -rw-r--r-- | arch/arm/boot/dts/nxp/imx/imx6qp-sabresd.dts | 58 |
3 files changed, 48 insertions, 52 deletions
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts b/arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts index ae00d538a4df..fbe260c9872e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts @@ -548,7 +548,7 @@ >; }; - pinctrl_wifi_npd: wifinpd { + pinctrl_wifi_npd: wifinpdgrp { fsl,pins = < /* WL_REG_ON */ MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x13069 diff --git a/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts b/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts index 2bb3bfb18ec3..c5b220aeaefd 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts @@ -22,27 +22,25 @@ }; &iomuxc { - imx6qdl-sabreauto { - pinctrl_enet: enetgrp { - fsl,pins = < - MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 - MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b018 - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b018 - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b018 - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b018 - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b018 - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b018 - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b018 - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b018 - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b018 - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b018 - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b018 - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b018 - MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 - MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 - >; - }; + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b018 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b018 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b018 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b018 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b018 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b018 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b018 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b018 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b018 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b018 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b018 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b018 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 + >; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qp-sabresd.dts b/arch/arm/boot/dts/nxp/imx/imx6qp-sabresd.dts index f69eec18d865..792697bd4551 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qp-sabresd.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6qp-sabresd.dts @@ -17,36 +17,34 @@ }; &iomuxc { - imx6qdl-sabresd { - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 - MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071 - MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 - MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 - MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 - MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 - MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059 - MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059 - MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059 - MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059 - >; - }; - - pinctrl_usdhc3: usdhc3grp { - fsl,pins = < - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10071 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 - MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 - MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 - MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 - MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 - >; - }; + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059 + MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059 + MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059 + MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10071 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 + >; }; }; |