diff options
4 files changed, 0 insertions, 21 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 1fd6faa0c70c..72f6acde544f 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -570,10 +570,6 @@ static void common_default_data(struct plat_stmmacenet_data *plat) plat->mdio_bus_data->needs_reset = true; - /* Disable Priority config by default */ - plat->tx_queues_cfg[0].use_prio = false; - plat->rx_queues_cfg[0].use_prio = false; - /* Disable RX queues routing by default */ plat->rx_queues_cfg[0].pkt_route = 0x0; } @@ -619,9 +615,6 @@ static int intel_mgbe_common_data(struct pci_dev *pdev, for (i = 0; i < plat->rx_queues_to_use; i++) { plat->rx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB; - /* Disable Priority config by default */ - plat->rx_queues_cfg[i].use_prio = false; - /* Disable RX queues routing by default */ plat->rx_queues_cfg[i].pkt_route = 0x0; } @@ -629,8 +622,6 @@ static int intel_mgbe_common_data(struct pci_dev *pdev, for (i = 0; i < plat->tx_queues_to_use; i++) { plat->tx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB; - /* Disable Priority config by default */ - plat->tx_queues_cfg[i].use_prio = false; /* Default TX Q0 to use TSO and rest TXQ for TBS */ if (i > 0) plat->tx_queues_cfg[i].tbs_en = 1; diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c index ed5e9ca738bf..c64a24bb060f 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c @@ -98,10 +98,6 @@ static void loongson_default_data(struct pci_dev *pdev, /* Increase the default value for multicast hash bins */ plat->multicast_filter_bins = 256; - /* Disable Priority config by default */ - plat->tx_queues_cfg[0].use_prio = false; - plat->rx_queues_cfg[0].use_prio = false; - /* Disable RX queues routing by default */ plat->rx_queues_cfg[0].pkt_route = 0x0; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c index ded44846f74a..2f45b7986903 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c @@ -28,10 +28,6 @@ static void common_default_data(struct plat_stmmacenet_data *plat) plat->mdio_bus_data->needs_reset = true; - /* Disable Priority config by default */ - plat->tx_queues_cfg[0].use_prio = false; - plat->rx_queues_cfg[0].use_prio = false; - /* Disable RX queues routing by default */ plat->rx_queues_cfg[0].pkt_route = 0x0; } @@ -74,7 +70,6 @@ static int snps_gmac5_default_data(struct pci_dev *pdev, plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR; for (i = 0; i < plat->tx_queues_to_use; i++) { - plat->tx_queues_cfg[i].use_prio = false; plat->tx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB; plat->tx_queues_cfg[i].weight = 25; if (i > 0) @@ -83,7 +78,6 @@ static int snps_gmac5_default_data(struct pci_dev *pdev, plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP; for (i = 0; i < plat->rx_queues_to_use; i++) { - plat->rx_queues_cfg[i].use_prio = false; plat->rx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB; plat->rx_queues_cfg[i].pkt_route = 0x0; } diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c index 7eb22511acf5..4750843cf102 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c @@ -184,7 +184,6 @@ static int stmmac_mtl_setup(struct platform_device *pdev, if (of_property_read_u32(q_node, "snps,priority", &plat->rx_queues_cfg[queue].prio)) { plat->rx_queues_cfg[queue].prio = 0; - plat->rx_queues_cfg[queue].use_prio = false; } else { plat->rx_queues_cfg[queue].use_prio = true; } @@ -261,7 +260,6 @@ static int stmmac_mtl_setup(struct platform_device *pdev, if (of_property_read_u32(q_node, "snps,priority", &plat->tx_queues_cfg[queue].prio)) { plat->tx_queues_cfg[queue].prio = 0; - plat->tx_queues_cfg[queue].use_prio = false; } else { plat->tx_queues_cfg[queue].use_prio = true; } |