diff options
| -rw-r--r-- | drivers/clk/samsung/clk-cpu.h | 2 | ||||
| -rw-r--r-- | drivers/clk/samsung/clk.h | 9 |
2 files changed, 7 insertions, 4 deletions
diff --git a/drivers/clk/samsung/clk-cpu.h b/drivers/clk/samsung/clk-cpu.h index fc9f67a3b22e..103f64193e42 100644 --- a/drivers/clk/samsung/clk-cpu.h +++ b/drivers/clk/samsung/clk-cpu.h @@ -11,7 +11,7 @@ #include "clk.h" /** - * struct exynos_cpuclk_data: config data to setup cpu clocks. + * struct exynos_cpuclk_cfg_data: config data to setup cpu clocks. * @prate: frequency of the primary parent clock (in KHz). * @div0: value to be programmed in the div_cpu0 register. * @div1: value to be programmed in the div_cpu1 register. diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h index ab9c3d7a25b3..4f17d5890a81 100644 --- a/drivers/clk/samsung/clk.h +++ b/drivers/clk/samsung/clk.h @@ -55,7 +55,7 @@ struct samsung_clock_alias { * @name: name of this fixed-rate clock. * @parent_name: optional parent clock name. * @flags: optional fixed-rate clock flags. - * @fixed-rate: fixed clock rate of this clock. + * @fixed_rate: fixed clock rate of this clock. */ struct samsung_fixed_rate_clock { unsigned int id; @@ -74,7 +74,7 @@ struct samsung_fixed_rate_clock { .fixed_rate = frate, \ } -/* +/** * struct samsung_fixed_factor_clock: information about fixed-factor clock * @id: platform specific id of the clock. * @name: name of this fixed-factor clock. @@ -146,14 +146,16 @@ struct samsung_mux_clock { __MUX(_id, cname, pnames, o, s, w, f, mf) /** - * @id: platform specific id of the clock. * struct samsung_div_clock: information about div clock + * @id: platform specific id of the clock. * @name: name of this div clock. * @parent_name: name of the parent clock. * @flags: optional flags for basic clock. * @offset: offset of the register for configuring the div. * @shift: starting bit location of the div control bit-field in @reg. + * @width: width of the bitfield. * @div_flags: flags for div-type clock. + * @table: array of divider/value pairs ending with a div set to 0. */ struct samsung_div_clock { unsigned int id; @@ -244,6 +246,7 @@ struct samsung_clk_reg_dump { * @con_offset: offset of the register for configuring the PLL. * @lock_offset: offset of the register for locking the PLL. * @type: Type of PLL to be registered. + * @rate_table: array of PLL settings for possible PLL rates. */ struct samsung_pll_clock { unsigned int id; |