diff options
Diffstat (limited to 'Documentation/devicetree/bindings/mailbox')
4 files changed, 88 insertions, 6 deletions
diff --git a/Documentation/devicetree/bindings/mailbox/allwinner,sun6i-a31-msgbox.yaml b/Documentation/devicetree/bindings/mailbox/allwinner,sun6i-a31-msgbox.yaml new file mode 100644 index 000000000000..75d5d97305e1 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/allwinner,sun6i-a31-msgbox.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/allwinner,sun6i-a31-msgbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner sunxi Message Box + +maintainers: + - Samuel Holland <samuel@sholland.org> + +description: | + The hardware message box on sun6i, sun8i, sun9i, and sun50i SoCs is a + two-user mailbox controller containing 8 unidirectional FIFOs. An interrupt + is raised for received messages, but software must poll to know when a + transmitted message has been acknowledged by the remote user. Each FIFO can + hold four 32-bit messages; when a FIFO is full, clients must wait before + attempting more transmissions. + + Refer to ./mailbox.txt for generic information about mailbox device-tree + bindings. + +properties: + compatible: + oneOf: + - items: + - enum: + - allwinner,sun8i-a83t-msgbox + - allwinner,sun8i-h3-msgbox + - allwinner,sun9i-a80-msgbox + - allwinner,sun50i-a64-msgbox + - allwinner,sun50i-h6-msgbox + - const: allwinner,sun6i-a31-msgbox + - const: allwinner,sun6i-a31-msgbox + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + description: bus clock + + resets: + maxItems: 1 + description: bus reset + + interrupts: + maxItems: 1 + + '#mbox-cells': + const: 1 + description: first cell is the channel number (0-7) + +required: + - compatible + - reg + - clocks + - resets + - interrupts + - '#mbox-cells' + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/sun8i-h3-ccu.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/reset/sun8i-h3-ccu.h> + + msgbox: mailbox@1c17000 { + compatible = "allwinner,sun8i-h3-msgbox", + "allwinner,sun6i-a31-msgbox"; + reg = <0x01c17000 0x1000>; + clocks = <&ccu CLK_BUS_MSGBOX>; + resets = <&ccu RST_BUS_MSGBOX>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <1>; + }; + +... diff --git a/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml b/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml index 319280563648..aa2b3bf56b57 100644 --- a/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml +++ b/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml @@ -41,6 +41,8 @@ required: - interrupts - "#mbox-cells" +additionalProperties: false + examples: - | mailbox@c883c404 { diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt index 9c43357c5924..31486c9f6443 100644 --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.txt +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.txt @@ -23,6 +23,8 @@ Required properties: be included together with SoC specific compatible. There is a version 1.0 MU on imx7ulp, use "fsl,imx7ulp-mu" compatible to support it. + To communicate with i.MX8 SCU, "fsl,imx8-mu-scu" could be + used for fast IPC - reg : Should contain the registers location and length - interrupts : Interrupt number. The interrupt specifier format depends on the interrupt controller parent. diff --git a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt b/Documentation/devicetree/bindings/mailbox/mtk-gce.txt index 7b13787ab13d..0b5b2a6bcc48 100644 --- a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt +++ b/Documentation/devicetree/bindings/mailbox/mtk-gce.txt @@ -14,13 +14,11 @@ Required properties: - interrupts: The interrupt signal from the GCE block - clock: Clocks according to the common clock binding - clock-names: Must be "gce" to stand for GCE clock -- #mbox-cells: Should be 3. - <&phandle channel priority atomic_exec> +- #mbox-cells: Should be 2. + <&phandle channel priority> phandle: Label name of a gce node. channel: Channel of mailbox. Be equal to the thread id of GCE. priority: Priority of GCE thread. - atomic_exec: GCE processing continuous packets of commands in atomic - way. Required properties for a client device: - mboxes: Client use mailbox to communicate with GCE, it should have this @@ -54,8 +52,8 @@ Example for a client device: mmsys: clock-controller@14000000 { compatible = "mediatek,mt8173-mmsys"; - mboxes = <&gce 0 CMDQ_THR_PRIO_LOWEST 1>, - <&gce 1 CMDQ_THR_PRIO_LOWEST 1>; + mboxes = <&gce 0 CMDQ_THR_PRIO_LOWEST>, + <&gce 1 CMDQ_THR_PRIO_LOWEST>; mutex-event-eof = <CMDQ_EVENT_MUTEX0_STREAM_EOF CMDQ_EVENT_MUTEX1_STREAM_EOF>; mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>, |