diff options
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mq.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mq.dtsi | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 75b384217a23..978f8122c0d2 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -291,7 +291,7 @@ bus@30000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; - reg = <0x301f0000 0x10000>; + reg = <0x30000000 0x400000>; #address-cells = <1>; #size-cells = <1>; ranges = <0x30000000 0x30000000 0x400000>; @@ -595,13 +595,19 @@ clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1", "clk_ext2", "clk_ext3", "clk_ext4"; - assigned-clocks = <&clk IMX8MQ_CLK_NOC>; - assigned-clock-rates = <800000000>; + assigned-clocks = <&clk IMX8MQ_CLK_A53_SRC>, + <&clk IMX8MQ_CLK_A53_CORE>, + <&clk IMX8MQ_CLK_NOC>; + assigned-clock-rates = <0>, <0>, + <800000000>; + assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>, + <&clk IMX8MQ_ARM_PLL_OUT>; }; src: reset-controller@30390000 { compatible = "fsl,imx8mq-src", "syscon"; reg = <0x30390000 0x10000>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; #reset-cells = <1>; }; @@ -696,7 +702,7 @@ bus@30400000 { /* AIPS2 */ compatible = "fsl,aips-bus", "simple-bus"; - reg = <0x305f0000 0x10000>; + reg = <0x30400000 0x400000>; #address-cells = <1>; #size-cells = <1>; ranges = <0x30400000 0x30400000 0x400000>; @@ -756,7 +762,7 @@ bus@30800000 { /* AIPS3 */ compatible = "fsl,aips-bus", "simple-bus"; - reg = <0x309f0000 0x10000>; + reg = <0x30800000 0x400000>; #address-cells = <1>; #size-cells = <1>; ranges = <0x30800000 0x30800000 0x400000>, @@ -1029,7 +1035,7 @@ bus@32c00000 { /* AIPS4 */ compatible = "fsl,aips-bus", "simple-bus"; - reg = <0x32df0000 0x10000>; + reg = <0x32c00000 0x400000>; #address-cells = <1>; #size-cells = <1>; ranges = <0x32c00000 0x32c00000 0x400000>; |