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-rw-r--r--arch/mips/netlogic/xlr/wakeup.c (renamed from arch/mips/netlogic/xlr/smpboot.S)80
1 files changed, 24 insertions, 56 deletions
diff --git a/arch/mips/netlogic/xlr/smpboot.S b/arch/mips/netlogic/xlr/wakeup.c
index 8cb7889ce0cc..db5d987d4881 100644
--- a/arch/mips/netlogic/xlr/smpboot.S
+++ b/arch/mips/netlogic/xlr/wakeup.c
@@ -33,68 +33,36 @@
*/
#include <linux/init.h>
+#include <linux/threads.h>
#include <asm/asm.h>
#include <asm/asm-offsets.h>
-#include <asm/regdef.h>
#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/string.h>
-/*
- * Early code for secondary CPUs. This will get them out of the bootloader
- * code and into linux. Needed because the bootloader area will be taken
- * and initialized by linux.
- */
- __CPUINIT
-NESTED(prom_pre_boot_secondary_cpus, 16, sp)
- .set mips64
- mfc0 t0, $15, 1 # read ebase
- andi t0, 0x1f # t0 has the processor_id()
- sll t0, 2 # offset in cpu array
-
- PTR_LA t1, nlm_cpu_ready # mark CPU ready
- PTR_ADDU t1, t0
- li t2, 1
- sw t2, 0(t1)
-
- PTR_LA t1, nlm_cpu_unblock
- PTR_ADDU t1, t0
-1: lw t2, 0(t1) # wait till unblocked
- beqz t2, 1b
- nop
+#include <asm/netlogic/haldefs.h>
+#include <asm/netlogic/common.h>
+#include <asm/netlogic/mips-extns.h>
- PTR_LA t1, nlm_next_sp
- PTR_L sp, 0(t1)
- PTR_LA t1, nlm_next_gp
- PTR_L gp, 0(t1)
+#include <asm/netlogic/xlr/iomap.h>
+#include <asm/netlogic/xlr/pic.h>
- PTR_LA t0, nlm_early_init_secondary
- jalr t0
- nop
-
- PTR_LA t0, smp_bootstrap
- jr t0
- nop
-END(prom_pre_boot_secondary_cpus)
- __FINIT
-
-/*
- * NMI code, used for CPU wakeup, copied to reset entry
- */
-NESTED(nlm_boot_smp_nmi, 0, sp)
- .set push
- .set noat
- .set mips64
- .set noreorder
+int __cpuinit xlr_wakeup_secondary_cpus(void)
+{
+ unsigned int i, boot_cpu;
- /* Clear the NMI and BEV bits */
- MFC0 k0, CP0_STATUS
- li k1, 0xffb7ffff
- and k0, k0, k1
- MTC0 k0, CP0_STATUS
+ /*
+ * In case of RMI boot, hit with NMI to get the cores
+ * from bootloader to linux code.
+ */
+ boot_cpu = hard_smp_processor_id();
+ nlm_set_nmi_handler(nlm_rmiboot_preboot);
+ for (i = 0; i < NR_CPUS; i++) {
+ if (i == boot_cpu || (nlm_cpumask & (1u << i)) == 0)
+ continue;
+ nlm_pic_send_ipi(nlm_pic_base, i, 1, 1); /* send NMI */
+ }
- PTR_LA k1, secondary_entry_point
- PTR_L k0, 0(k1)
- jr k0
- nop
- .set pop
-END(nlm_boot_smp_nmi)
+ return 0;
+}