diff options
Diffstat (limited to 'drivers/gpu/drm/amd/include/asic_reg/mp/mp_14_0_2_offset.h')
| -rw-r--r-- | drivers/gpu/drm/amd/include/asic_reg/mp/mp_14_0_2_offset.h | 468 |
1 files changed, 468 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/asic_reg/mp/mp_14_0_2_offset.h b/drivers/gpu/drm/amd/include/asic_reg/mp/mp_14_0_2_offset.h new file mode 100644 index 000000000000..6a1b7b524809 --- /dev/null +++ b/drivers/gpu/drm/amd/include/asic_reg/mp/mp_14_0_2_offset.h @@ -0,0 +1,468 @@ +/* + * Copyright 2023 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + */ +#ifndef _mp_14_0_2_OFFSET_HEADER +#define _mp_14_0_2_OFFSET_HEADER + + +// addressBlock: mp_SmuMp1_SmnDec +// base address: 0x0 +#define regMP1_SMN_C2PMSG_0 0x0040 +#define regMP1_SMN_C2PMSG_0_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_1 0x0041 +#define regMP1_SMN_C2PMSG_1_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_2 0x0042 +#define regMP1_SMN_C2PMSG_2_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_3 0x0043 +#define regMP1_SMN_C2PMSG_3_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_4 0x0044 +#define regMP1_SMN_C2PMSG_4_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_5 0x0045 +#define regMP1_SMN_C2PMSG_5_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_6 0x0046 +#define regMP1_SMN_C2PMSG_6_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_7 0x0047 +#define regMP1_SMN_C2PMSG_7_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_8 0x0048 +#define regMP1_SMN_C2PMSG_8_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_9 0x0049 +#define regMP1_SMN_C2PMSG_9_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_10 0x004a +#define regMP1_SMN_C2PMSG_10_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_11 0x004b +#define regMP1_SMN_C2PMSG_11_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_12 0x004c +#define regMP1_SMN_C2PMSG_12_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_13 0x004d +#define regMP1_SMN_C2PMSG_13_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_14 0x004e +#define regMP1_SMN_C2PMSG_14_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_15 0x004f +#define regMP1_SMN_C2PMSG_15_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_16 0x0050 +#define regMP1_SMN_C2PMSG_16_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_17 0x0051 +#define regMP1_SMN_C2PMSG_17_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_18 0x0052 +#define regMP1_SMN_C2PMSG_18_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_19 0x0053 +#define regMP1_SMN_C2PMSG_19_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_20 0x0054 +#define regMP1_SMN_C2PMSG_20_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_21 0x0055 +#define regMP1_SMN_C2PMSG_21_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_22 0x0056 +#define regMP1_SMN_C2PMSG_22_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_23 0x0057 +#define regMP1_SMN_C2PMSG_23_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_24 0x0058 +#define regMP1_SMN_C2PMSG_24_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_25 0x0059 +#define regMP1_SMN_C2PMSG_25_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_26 0x005a +#define regMP1_SMN_C2PMSG_26_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_27 0x005b +#define regMP1_SMN_C2PMSG_27_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_28 0x005c +#define regMP1_SMN_C2PMSG_28_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_29 0x005d +#define regMP1_SMN_C2PMSG_29_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_30 0x005e +#define regMP1_SMN_C2PMSG_30_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_31 0x005f +#define regMP1_SMN_C2PMSG_31_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_32 0x0060 +#define regMP1_SMN_C2PMSG_32_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_33 0x0061 +#define regMP1_SMN_C2PMSG_33_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_34 0x0062 +#define regMP1_SMN_C2PMSG_34_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_35 0x0063 +#define regMP1_SMN_C2PMSG_35_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_36 0x0064 +#define regMP1_SMN_C2PMSG_36_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_37 0x0065 +#define regMP1_SMN_C2PMSG_37_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_38 0x0066 +#define regMP1_SMN_C2PMSG_38_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_39 0x0067 +#define regMP1_SMN_C2PMSG_39_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_40 0x0068 +#define regMP1_SMN_C2PMSG_40_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_41 0x0069 +#define regMP1_SMN_C2PMSG_41_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_42 0x006a +#define regMP1_SMN_C2PMSG_42_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_43 0x006b +#define regMP1_SMN_C2PMSG_43_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_44 0x006c +#define regMP1_SMN_C2PMSG_44_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_45 0x006d +#define regMP1_SMN_C2PMSG_45_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_46 0x006e +#define regMP1_SMN_C2PMSG_46_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_47 0x006f +#define regMP1_SMN_C2PMSG_47_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_48 0x0070 +#define regMP1_SMN_C2PMSG_48_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_49 0x0071 +#define regMP1_SMN_C2PMSG_49_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_50 0x0072 +#define regMP1_SMN_C2PMSG_50_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_51 0x0073 +#define regMP1_SMN_C2PMSG_51_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_52 0x0074 +#define regMP1_SMN_C2PMSG_52_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_53 0x0075 +#define regMP1_SMN_C2PMSG_53_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_54 0x0076 +#define regMP1_SMN_C2PMSG_54_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_55 0x0077 +#define regMP1_SMN_C2PMSG_55_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_56 0x0078 +#define regMP1_SMN_C2PMSG_56_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_57 0x0079 +#define regMP1_SMN_C2PMSG_57_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_58 0x007a +#define regMP1_SMN_C2PMSG_58_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_59 0x007b +#define regMP1_SMN_C2PMSG_59_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_60 0x007c +#define regMP1_SMN_C2PMSG_60_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_61 0x007d +#define regMP1_SMN_C2PMSG_61_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_62 0x007e +#define regMP1_SMN_C2PMSG_62_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_63 0x007f +#define regMP1_SMN_C2PMSG_63_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_64 0x0080 +#define regMP1_SMN_C2PMSG_64_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_65 0x0081 +#define regMP1_SMN_C2PMSG_65_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_66 0x0082 +#define regMP1_SMN_C2PMSG_66_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_67 0x0083 +#define regMP1_SMN_C2PMSG_67_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_68 0x0084 +#define regMP1_SMN_C2PMSG_68_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_69 0x0085 +#define regMP1_SMN_C2PMSG_69_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_70 0x0086 +#define regMP1_SMN_C2PMSG_70_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_71 0x0087 +#define regMP1_SMN_C2PMSG_71_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_72 0x0088 +#define regMP1_SMN_C2PMSG_72_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_73 0x0089 +#define regMP1_SMN_C2PMSG_73_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_74 0x008a +#define regMP1_SMN_C2PMSG_74_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_75 0x008b +#define regMP1_SMN_C2PMSG_75_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_76 0x008c +#define regMP1_SMN_C2PMSG_76_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_77 0x008d +#define regMP1_SMN_C2PMSG_77_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_78 0x008e +#define regMP1_SMN_C2PMSG_78_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_79 0x008f +#define regMP1_SMN_C2PMSG_79_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_80 0x0090 +#define regMP1_SMN_C2PMSG_80_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_81 0x0091 +#define regMP1_SMN_C2PMSG_81_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_82 0x0092 +#define regMP1_SMN_C2PMSG_82_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_83 0x0093 +#define regMP1_SMN_C2PMSG_83_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_84 0x0094 +#define regMP1_SMN_C2PMSG_84_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_85 0x0095 +#define regMP1_SMN_C2PMSG_85_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_86 0x0096 +#define regMP1_SMN_C2PMSG_86_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_87 0x0097 +#define regMP1_SMN_C2PMSG_87_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_88 0x0098 +#define regMP1_SMN_C2PMSG_88_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_89 0x0099 +#define regMP1_SMN_C2PMSG_89_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_90 0x009a +#define regMP1_SMN_C2PMSG_90_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_91 0x009b +#define regMP1_SMN_C2PMSG_91_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_92 0x009c +#define regMP1_SMN_C2PMSG_92_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_93 0x009d +#define regMP1_SMN_C2PMSG_93_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_94 0x009e +#define regMP1_SMN_C2PMSG_94_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_95 0x009f +#define regMP1_SMN_C2PMSG_95_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_96 0x00a0 +#define regMP1_SMN_C2PMSG_96_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_97 0x00a1 +#define regMP1_SMN_C2PMSG_97_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_98 0x00a2 +#define regMP1_SMN_C2PMSG_98_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_99 0x00a3 +#define regMP1_SMN_C2PMSG_99_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_100 0x00a4 +#define regMP1_SMN_C2PMSG_100_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_101 0x00a5 +#define regMP1_SMN_C2PMSG_101_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_102 0x00a6 +#define regMP1_SMN_C2PMSG_102_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_103 0x00a7 +#define regMP1_SMN_C2PMSG_103_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_104 0x00a8 +#define regMP1_SMN_C2PMSG_104_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_105 0x00a9 +#define regMP1_SMN_C2PMSG_105_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_106 0x00aa +#define regMP1_SMN_C2PMSG_106_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_107 0x00ab +#define regMP1_SMN_C2PMSG_107_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_108 0x00ac +#define regMP1_SMN_C2PMSG_108_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_109 0x00ad +#define regMP1_SMN_C2PMSG_109_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_110 0x00ae +#define regMP1_SMN_C2PMSG_110_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_111 0x00af +#define regMP1_SMN_C2PMSG_111_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_112 0x00b0 +#define regMP1_SMN_C2PMSG_112_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_113 0x00b1 +#define regMP1_SMN_C2PMSG_113_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_114 0x00b2 +#define regMP1_SMN_C2PMSG_114_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_115 0x00b3 +#define regMP1_SMN_C2PMSG_115_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_116 0x00b4 +#define regMP1_SMN_C2PMSG_116_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_117 0x00b5 +#define regMP1_SMN_C2PMSG_117_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_118 0x00b6 +#define regMP1_SMN_C2PMSG_118_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_119 0x00b7 +#define regMP1_SMN_C2PMSG_119_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_120 0x00b8 +#define regMP1_SMN_C2PMSG_120_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_121 0x00b9 +#define regMP1_SMN_C2PMSG_121_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_122 0x00ba +#define regMP1_SMN_C2PMSG_122_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_123 0x00bb +#define regMP1_SMN_C2PMSG_123_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_124 0x00bc +#define regMP1_SMN_C2PMSG_124_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_125 0x00bd +#define regMP1_SMN_C2PMSG_125_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_126 0x00be +#define regMP1_SMN_C2PMSG_126_BASE_IDX 1 +#define regMP1_SMN_C2PMSG_127 0x00bf +#define regMP1_SMN_C2PMSG_127_BASE_IDX 1 +#define regMP1_SMN_IH_CREDIT 0x0140 +#define regMP1_SMN_IH_CREDIT_BASE_IDX 1 +#define regMP1_SMN_IH_SW_INT 0x0141 +#define regMP1_SMN_IH_SW_INT_BASE_IDX 1 +#define regMP1_SMN_IH_SW_INT_CTRL 0x0142 +#define regMP1_SMN_IH_SW_INT_CTRL_BASE_IDX 1 +#define regMP1_SMN_FPS_CNT 0x0143 +#define regMP1_SMN_FPS_CNT_BASE_IDX 1 +#define regMP1_SMN_PUB_CTRL 0x0144 +#define regMP1_SMN_PUB_CTRL_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH0 0x01c0 +#define regMP1_SMN_EXT_SCRATCH0_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH1 0x01c1 +#define regMP1_SMN_EXT_SCRATCH1_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH2 0x01c2 +#define regMP1_SMN_EXT_SCRATCH2_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH3 0x01c3 +#define regMP1_SMN_EXT_SCRATCH3_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH4 0x01c4 +#define regMP1_SMN_EXT_SCRATCH4_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH5 0x01c5 +#define regMP1_SMN_EXT_SCRATCH5_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH6 0x01c6 +#define regMP1_SMN_EXT_SCRATCH6_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH7 0x01c7 +#define regMP1_SMN_EXT_SCRATCH7_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH8 0x01c8 +#define regMP1_SMN_EXT_SCRATCH8_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH9 0x01c9 +#define regMP1_SMN_EXT_SCRATCH9_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH10 0x01ca +#define regMP1_SMN_EXT_SCRATCH10_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH11 0x01cb +#define regMP1_SMN_EXT_SCRATCH11_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH12 0x01cc +#define regMP1_SMN_EXT_SCRATCH12_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH13 0x01cd +#define regMP1_SMN_EXT_SCRATCH13_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH14 0x01ce +#define regMP1_SMN_EXT_SCRATCH14_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH15 0x01cf +#define regMP1_SMN_EXT_SCRATCH15_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH16 0x01d0 +#define regMP1_SMN_EXT_SCRATCH16_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH17 0x01d1 +#define regMP1_SMN_EXT_SCRATCH17_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH18 0x01d2 +#define regMP1_SMN_EXT_SCRATCH18_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH19 0x01d3 +#define regMP1_SMN_EXT_SCRATCH19_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH20 0x01d4 +#define regMP1_SMN_EXT_SCRATCH20_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH21 0x01d5 +#define regMP1_SMN_EXT_SCRATCH21_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH22 0x01d6 +#define regMP1_SMN_EXT_SCRATCH22_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH23 0x01d7 +#define regMP1_SMN_EXT_SCRATCH23_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH24 0x01d8 +#define regMP1_SMN_EXT_SCRATCH24_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH25 0x01d9 +#define regMP1_SMN_EXT_SCRATCH25_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH26 0x01da +#define regMP1_SMN_EXT_SCRATCH26_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH27 0x01db +#define regMP1_SMN_EXT_SCRATCH27_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH28 0x01dc +#define regMP1_SMN_EXT_SCRATCH28_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH29 0x01dd +#define regMP1_SMN_EXT_SCRATCH29_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH30 0x01de +#define regMP1_SMN_EXT_SCRATCH30_BASE_IDX 1 +#define regMP1_SMN_EXT_SCRATCH31 0x01df +#define regMP1_SMN_EXT_SCRATCH31_BASE_IDX 1 + + +// addressBlock: mp_SmuMpASP_SmnDec +// base address: 0x0 +#define regMPASP_SMN_C2PMSG_32 0x0060 +#define regMPASP_SMN_C2PMSG_32_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_33 0x0061 +#define regMPASP_SMN_C2PMSG_33_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_34 0x0062 +#define regMPASP_SMN_C2PMSG_34_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_35 0x0063 +#define regMPASP_SMN_C2PMSG_35_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_36 0x0064 +#define regMPASP_SMN_C2PMSG_36_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_37 0x0065 +#define regMPASP_SMN_C2PMSG_37_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_38 0x0066 +#define regMPASP_SMN_C2PMSG_38_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_39 0x0067 +#define regMPASP_SMN_C2PMSG_39_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_60 0x007c +#define regMPASP_SMN_C2PMSG_60_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_61 0x007d +#define regMPASP_SMN_C2PMSG_61_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_62 0x007e +#define regMPASP_SMN_C2PMSG_62_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_63 0x007f +#define regMPASP_SMN_C2PMSG_63_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_64 0x0080 +#define regMPASP_SMN_C2PMSG_64_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_65 0x0081 +#define regMPASP_SMN_C2PMSG_65_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_66 0x0082 +#define regMPASP_SMN_C2PMSG_66_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_67 0x0083 +#define regMPASP_SMN_C2PMSG_67_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_68 0x0084 +#define regMPASP_SMN_C2PMSG_68_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_69 0x0085 +#define regMPASP_SMN_C2PMSG_69_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_70 0x0086 +#define regMPASP_SMN_C2PMSG_70_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_71 0x0087 +#define regMPASP_SMN_C2PMSG_71_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_72 0x0088 +#define regMPASP_SMN_C2PMSG_72_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_73 0x0089 +#define regMPASP_SMN_C2PMSG_73_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_74 0x008a +#define regMPASP_SMN_C2PMSG_74_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_75 0x008b +#define regMPASP_SMN_C2PMSG_75_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_76 0x008c +#define regMPASP_SMN_C2PMSG_76_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_77 0x008d +#define regMPASP_SMN_C2PMSG_77_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_78 0x008e +#define regMPASP_SMN_C2PMSG_78_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_79 0x008f +#define regMPASP_SMN_C2PMSG_79_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_80 0x0090 +#define regMPASP_SMN_C2PMSG_80_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_81 0x0091 +#define regMPASP_SMN_C2PMSG_81_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_82 0x0092 +#define regMPASP_SMN_C2PMSG_82_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_83 0x0093 +#define regMPASP_SMN_C2PMSG_83_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_84 0x0094 +#define regMPASP_SMN_C2PMSG_84_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_85 0x0095 +#define regMPASP_SMN_C2PMSG_85_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_86 0x0096 +#define regMPASP_SMN_C2PMSG_86_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_87 0x0097 +#define regMPASP_SMN_C2PMSG_87_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_88 0x0098 +#define regMPASP_SMN_C2PMSG_88_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_89 0x0099 +#define regMPASP_SMN_C2PMSG_89_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_100 0x00a4 +#define regMPASP_SMN_C2PMSG_100_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_101 0x00a5 +#define regMPASP_SMN_C2PMSG_101_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_102 0x00a6 +#define regMPASP_SMN_C2PMSG_102_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_103 0x00a7 +#define regMPASP_SMN_C2PMSG_103_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_109 0x00ad +#define regMPASP_SMN_C2PMSG_109_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_115 0x00b3 +#define regMPASP_SMN_C2PMSG_115_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_116 0x00b4 +#define regMPASP_SMN_C2PMSG_116_BASE_IDX 0 +#define regMPASP_SMN_C2PMSG_119_BASE_IDX 0 +#define regMPASP_SMN_IH_CREDIT 0x0140 +#define regMPASP_SMN_IH_CREDIT_BASE_IDX 0 +#define regMPASP_SMN_IH_SW_INT 0x0141 +#define regMPASP_SMN_IH_SW_INT_BASE_IDX 0 +#define regMPASP_SMN_IH_SW_INT_CTRL 0x0142 +#define regMPASP_SMN_IH_SW_INT_CTRL_BASE_IDX 0 + + +// addressBlock: Mp1MmioPublic_SmuMp1Pub_CruDec +// base address: 0x3b00000 +#define regMP1_CRU1_MP1_FIRMWARE_FLAGS 0x4009 +#define regMP1_CRU1_MP1_FIRMWARE_FLAGS_BASE_IDX 7 + + +#endif |