diff options
Diffstat (limited to 'drivers/gpu/drm/sun4i')
| -rw-r--r-- | drivers/gpu/drm/sun4i/Kconfig | 28 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun4i_backend.c | 17 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun4i_drv.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun4i_frontend.c | 26 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun4i_layer.c | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun4i_tv.c | 64 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_mixer.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 27 | ||||
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 27 |
9 files changed, 90 insertions, 113 deletions
diff --git a/drivers/gpu/drm/sun4i/Kconfig b/drivers/gpu/drm/sun4i/Kconfig index 3a43c436c74a..4741d9f6544c 100644 --- a/drivers/gpu/drm/sun4i/Kconfig +++ b/drivers/gpu/drm/sun4i/Kconfig @@ -3,7 +3,7 @@ config DRM_SUN4I tristate "DRM Support for Allwinner A10 Display Engine" depends on DRM && COMMON_CLK depends on ARCH_SUNXI || COMPILE_TEST - select DRM_GEM_CMA_HELPER + select DRM_GEM_DMA_HELPER select DRM_KMS_HELPER select DRM_PANEL select REGMAP_MMIO @@ -16,23 +16,25 @@ config DRM_SUN4I if DRM_SUN4I config DRM_SUN4I_HDMI - tristate "Allwinner A10 HDMI Controller Support" + tristate "Allwinner A10/A10s/A20/A31 HDMI Controller Support" + depends on ARM || COMPILE_TEST default DRM_SUN4I help - Choose this option if you have an Allwinner SoC with an HDMI - controller. + Choose this option if you have an Allwinner A10/A10s/A20/A31 + SoC with an HDMI controller. config DRM_SUN4I_HDMI_CEC - bool "Allwinner A10 HDMI CEC Support" + bool "Allwinner A10/A10s/A20/A31 HDMI CEC Support" depends on DRM_SUN4I_HDMI select CEC_CORE select CEC_PIN help - Choose this option if you have an Allwinner SoC with an HDMI - controller and want to use CEC. + Choose this option if you have an Allwinner A10/A10s/A20/A31 + SoC with an HDMI controller and want to use CEC. config DRM_SUN4I_BACKEND tristate "Support for Allwinner A10 Display Engine Backend" + depends on ARM || COMPILE_TEST default DRM_SUN4I help Choose this option if you have an Allwinner SoC with the @@ -41,8 +43,8 @@ config DRM_SUN4I_BACKEND selected the module will be called sun4i-backend. config DRM_SUN6I_DSI - tristate "Allwinner A31 MIPI-DSI Controller Support" - default MACH_SUN8I + tristate "Allwinner A31/A64 MIPI-DSI Controller Support" + default DRM_SUN4I select CRC_CCITT select DRM_MIPI_DSI select RESET_CONTROLLER @@ -55,15 +57,17 @@ config DRM_SUN6I_DSI config DRM_SUN8I_DW_HDMI tristate "Support for Allwinner version of DesignWare HDMI" depends on DRM_SUN4I + default DRM_SUN4I select DRM_DW_HDMI help Choose this option if you have an Allwinner SoC with the - DesignWare HDMI controller with custom HDMI PHY. If M is + DesignWare HDMI controller. SoCs that support HDMI and + have a Display Engine 2.0 contain this controller. If M is selected the module will be called sun8i_dw_hdmi. config DRM_SUN8I_MIXER tristate "Support for Allwinner Display Engine 2.0 Mixer" - default MACH_SUN8I + default DRM_SUN4I help Choose this option if you have an Allwinner SoC with the Allwinner Display Engine 2.0, which has a mixer to do some @@ -75,6 +79,6 @@ config DRM_SUN8I_TCON_TOP default DRM_SUN4I if DRM_SUN8I_MIXER!=n help TCON TOP is responsible for configuring display pipeline for - HTMI, TVE and LCD. + HDMI, TVE and LCD. endif diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c index 287e8c4bbaea..38070fc261f3 100644 --- a/drivers/gpu/drm/sun4i/sun4i_backend.c +++ b/drivers/gpu/drm/sun4i/sun4i_backend.c @@ -19,11 +19,10 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_blend.h> #include <drm/drm_crtc.h> -#include <drm/drm_fb_cma_helper.h> +#include <drm/drm_fb_dma_helper.h> #include <drm/drm_fourcc.h> #include <drm/drm_framebuffer.h> -#include <drm/drm_gem_cma_helper.h> -#include <drm/drm_plane_helper.h> +#include <drm/drm_gem_dma_helper.h> #include <drm/drm_probe_helper.h> #include "sun4i_backend.h" @@ -330,7 +329,7 @@ int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend, struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; u32 lo_paddr, hi_paddr; - dma_addr_t paddr; + dma_addr_t dma_addr; /* Set the line width */ DRM_DEBUG_DRIVER("Layer line width: %d bits\n", fb->pitches[0] * 8); @@ -339,21 +338,21 @@ int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend, fb->pitches[0] * 8); /* Get the start of the displayed memory */ - paddr = drm_fb_cma_get_gem_addr(fb, state, 0); - DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr); + dma_addr = drm_fb_dma_get_gem_addr(fb, state, 0); + DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &dma_addr); if (fb->format->is_yuv) - return sun4i_backend_update_yuv_buffer(backend, fb, paddr); + return sun4i_backend_update_yuv_buffer(backend, fb, dma_addr); /* Write the 32 lower bits of the address (in bits) */ - lo_paddr = paddr << 3; + lo_paddr = dma_addr << 3; DRM_DEBUG_DRIVER("Setting address lower bits to 0x%x\n", lo_paddr); regmap_write(backend->engine.regs, SUN4I_BACKEND_LAYFB_L32ADD_REG(layer), lo_paddr); /* And the upper bits */ - hi_paddr = paddr >> 29; + hi_paddr = dma_addr >> 29; DRM_DEBUG_DRIVER("Setting address high bits to 0x%x\n", hi_paddr); regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_LAYFB_H4ADD_REG, SUN4I_BACKEND_LAYFB_H4ADD_MSK(layer), diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c index 6eb1aabdb161..d06ffd99d86e 100644 --- a/drivers/gpu/drm/sun4i/sun4i_drv.c +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c @@ -17,9 +17,8 @@ #include <drm/drm_aperture.h> #include <drm/drm_atomic_helper.h> #include <drm/drm_drv.h> -#include <drm/drm_fb_cma_helper.h> #include <drm/drm_fb_helper.h> -#include <drm/drm_gem_cma_helper.h> +#include <drm/drm_gem_dma_helper.h> #include <drm/drm_module.h> #include <drm/drm_of.h> #include <drm/drm_probe_helper.h> @@ -38,10 +37,10 @@ static int drm_sun4i_gem_dumb_create(struct drm_file *file_priv, /* The hardware only allows even pitches for YUV buffers. */ args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), 2); - return drm_gem_cma_dumb_create_internal(file_priv, drm, args); + return drm_gem_dma_dumb_create_internal(file_priv, drm, args); } -DEFINE_DRM_GEM_CMA_FOPS(sun4i_drv_fops); +DEFINE_DRM_GEM_DMA_FOPS(sun4i_drv_fops); static const struct drm_driver sun4i_drv_driver = { .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, @@ -55,7 +54,7 @@ static const struct drm_driver sun4i_drv_driver = { .minor = 0, /* GEM Operations */ - DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(drm_sun4i_gem_dumb_create), + DRM_GEM_DMA_DRIVER_OPS_WITH_DUMB_CREATE(drm_sun4i_gem_dumb_create), }; static int sun4i_drv_bind(struct device *dev) diff --git a/drivers/gpu/drm/sun4i/sun4i_frontend.c b/drivers/gpu/drm/sun4i/sun4i_frontend.c index 462fae73eae9..799ab7460ae5 100644 --- a/drivers/gpu/drm/sun4i/sun4i_frontend.c +++ b/drivers/gpu/drm/sun4i/sun4i_frontend.c @@ -14,10 +14,10 @@ #include <linux/reset.h> #include <drm/drm_device.h> -#include <drm/drm_fb_cma_helper.h> +#include <drm/drm_fb_dma_helper.h> #include <drm/drm_fourcc.h> #include <drm/drm_framebuffer.h> -#include <drm/drm_gem_cma_helper.h> +#include <drm/drm_gem_dma_helper.h> #include <drm/drm_plane.h> #include "sun4i_drv.h" @@ -160,7 +160,7 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, struct drm_framebuffer *fb = state->fb; unsigned int strides[3] = {}; - dma_addr_t paddr; + dma_addr_t dma_addr; bool swap; if (fb->modifier == DRM_FORMAT_MOD_ALLWINNER_TILED) { @@ -221,22 +221,24 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, swap = sun4i_frontend_format_chroma_requires_swap(fb->format->format); /* Set the physical address of the buffer in memory */ - paddr = drm_fb_cma_get_gem_addr(fb, state, 0); - DRM_DEBUG_DRIVER("Setting buffer #0 address to %pad\n", &paddr); - regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR0_REG, paddr); + dma_addr = drm_fb_dma_get_gem_addr(fb, state, 0); + DRM_DEBUG_DRIVER("Setting buffer #0 address to %pad\n", &dma_addr); + regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR0_REG, dma_addr); if (fb->format->num_planes > 1) { - paddr = drm_fb_cma_get_gem_addr(fb, state, swap ? 2 : 1); - DRM_DEBUG_DRIVER("Setting buffer #1 address to %pad\n", &paddr); + dma_addr = drm_fb_dma_get_gem_addr(fb, state, swap ? 2 : 1); + DRM_DEBUG_DRIVER("Setting buffer #1 address to %pad\n", + &dma_addr); regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR1_REG, - paddr); + dma_addr); } if (fb->format->num_planes > 2) { - paddr = drm_fb_cma_get_gem_addr(fb, state, swap ? 1 : 2); - DRM_DEBUG_DRIVER("Setting buffer #2 address to %pad\n", &paddr); + dma_addr = drm_fb_dma_get_gem_addr(fb, state, swap ? 1 : 2); + DRM_DEBUG_DRIVER("Setting buffer #2 address to %pad\n", + &dma_addr); regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR2_REG, - paddr); + dma_addr); } } EXPORT_SYMBOL(sun4i_frontend_update_buffer); diff --git a/drivers/gpu/drm/sun4i/sun4i_layer.c b/drivers/gpu/drm/sun4i/sun4i_layer.c index 648dd0b5b116..98f3176366c0 100644 --- a/drivers/gpu/drm/sun4i/sun4i_layer.c +++ b/drivers/gpu/drm/sun4i/sun4i_layer.c @@ -10,7 +10,6 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_blend.h> #include <drm/drm_gem_atomic_helper.h> -#include <drm/drm_plane_helper.h> #include "sun4i_backend.h" #include "sun4i_frontend.h" diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c index 94883abe0dfd..c65f0a89b6b0 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tv.c +++ b/drivers/gpu/drm/sun4i/sun4i_tv.c @@ -14,6 +14,7 @@ #include <linux/regmap.h> #include <linux/reset.h> +#include <drm/drm_atomic.h> #include <drm/drm_atomic_helper.h> #include <drm/drm_of.h> #include <drm/drm_panel.h> @@ -275,13 +276,6 @@ drm_encoder_to_sun4i_tv(struct drm_encoder *encoder) encoder); } -static inline struct sun4i_tv * -drm_connector_to_sun4i_tv(struct drm_connector *connector) -{ - return container_of(connector, struct sun4i_tv, - connector); -} - /* * FIXME: If only the drm_display_mode private field was usable, this * could go away... @@ -339,7 +333,8 @@ static void sun4i_tv_mode_to_drm_mode(const struct tv_mode *tv_mode, mode->vtotal = mode->vsync_end + tv_mode->vback_porch; } -static void sun4i_tv_disable(struct drm_encoder *encoder) +static void sun4i_tv_disable(struct drm_encoder *encoder, + struct drm_atomic_state *state) { struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder); struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); @@ -353,27 +348,18 @@ static void sun4i_tv_disable(struct drm_encoder *encoder) sunxi_engine_disable_color_correction(crtc->engine); } -static void sun4i_tv_enable(struct drm_encoder *encoder) +static void sun4i_tv_enable(struct drm_encoder *encoder, + struct drm_atomic_state *state) { struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder); struct sun4i_crtc *crtc = drm_crtc_to_sun4i_crtc(encoder->crtc); + struct drm_crtc_state *crtc_state = + drm_atomic_get_new_crtc_state(state, encoder->crtc); + struct drm_display_mode *mode = &crtc_state->mode; + const struct tv_mode *tv_mode = sun4i_tv_find_tv_by_mode(mode); DRM_DEBUG_DRIVER("Enabling the TV Output\n"); - sunxi_engine_apply_color_correction(crtc->engine); - - regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, - SUN4I_TVE_EN_ENABLE, - SUN4I_TVE_EN_ENABLE); -} - -static void sun4i_tv_mode_set(struct drm_encoder *encoder, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) -{ - struct sun4i_tv *tv = drm_encoder_to_sun4i_tv(encoder); - const struct tv_mode *tv_mode = sun4i_tv_find_tv_by_mode(mode); - /* Enable and map the DAC to the output */ regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, SUN4I_TVE_EN_DAC_MAP_MASK, @@ -466,12 +452,17 @@ static void sun4i_tv_mode_set(struct drm_encoder *encoder, SUN4I_TVE_RESYNC_FIELD : 0)); regmap_write(tv->regs, SUN4I_TVE_SLAVE_REG, 0); + + sunxi_engine_apply_color_correction(crtc->engine); + + regmap_update_bits(tv->regs, SUN4I_TVE_EN_REG, + SUN4I_TVE_EN_ENABLE, + SUN4I_TVE_EN_ENABLE); } static const struct drm_encoder_helper_funcs sun4i_tv_helper_funcs = { - .disable = sun4i_tv_disable, - .enable = sun4i_tv_enable, - .mode_set = sun4i_tv_mode_set, + .atomic_disable = sun4i_tv_disable, + .atomic_enable = sun4i_tv_enable, }; static int sun4i_tv_comp_get_modes(struct drm_connector *connector) @@ -497,27 +488,13 @@ static int sun4i_tv_comp_get_modes(struct drm_connector *connector) return i; } -static int sun4i_tv_comp_mode_valid(struct drm_connector *connector, - struct drm_display_mode *mode) -{ - /* TODO */ - return MODE_OK; -} - static const struct drm_connector_helper_funcs sun4i_tv_comp_connector_helper_funcs = { .get_modes = sun4i_tv_comp_get_modes, - .mode_valid = sun4i_tv_comp_mode_valid, }; -static void -sun4i_tv_comp_connector_destroy(struct drm_connector *connector) -{ - drm_connector_cleanup(connector); -} - static const struct drm_connector_funcs sun4i_tv_comp_connector_funcs = { .fill_modes = drm_helper_probe_single_connector_modes, - .destroy = sun4i_tv_comp_connector_destroy, + .destroy = drm_connector_cleanup, .reset = drm_atomic_helper_connector_reset, .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, @@ -604,7 +581,7 @@ static int sun4i_tv_bind(struct device *dev, struct device *master, if (ret) { dev_err(dev, "Couldn't initialise the Composite connector\n"); - goto err_cleanup_connector; + goto err_cleanup_encoder; } tv->connector.interlace_allowed = true; @@ -612,7 +589,7 @@ static int sun4i_tv_bind(struct device *dev, struct device *master, return 0; -err_cleanup_connector: +err_cleanup_encoder: drm_encoder_cleanup(&tv->encoder); err_disable_clk: clk_disable_unprepare(tv->clk); @@ -629,6 +606,7 @@ static void sun4i_tv_unbind(struct device *dev, struct device *master, drm_connector_cleanup(&tv->connector); drm_encoder_cleanup(&tv->encoder); clk_disable_unprepare(tv->clk); + reset_control_assert(tv->reset); } static const struct component_ops sun4i_tv_ops = { diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 648b38a73066..bafee05f6b24 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -16,10 +16,8 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_crtc.h> -#include <drm/drm_fb_cma_helper.h> #include <drm/drm_framebuffer.h> -#include <drm/drm_gem_cma_helper.h> -#include <drm/drm_plane_helper.h> +#include <drm/drm_gem_dma_helper.h> #include <drm/drm_probe_helper.h> #include "sun4i_drv.h" diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index 36da962de394..ca75ca0835a6 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -13,12 +13,11 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_blend.h> #include <drm/drm_crtc.h> -#include <drm/drm_fb_cma_helper.h> +#include <drm/drm_fb_dma_helper.h> #include <drm/drm_fourcc.h> #include <drm/drm_framebuffer.h> #include <drm/drm_gem_atomic_helper.h> -#include <drm/drm_gem_cma_helper.h> -#include <drm/drm_plane_helper.h> +#include <drm/drm_gem_dma_helper.h> #include <drm/drm_probe_helper.h> #include "sun8i_mixer.h" @@ -193,25 +192,25 @@ static int sun8i_ui_layer_update_buffer(struct sun8i_mixer *mixer, int channel, { struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; - struct drm_gem_cma_object *gem; - dma_addr_t paddr; + struct drm_gem_dma_object *gem; + dma_addr_t dma_addr; u32 ch_base; int bpp; ch_base = sun8i_channel_base(mixer, channel); /* Get the physical address of the buffer in memory */ - gem = drm_fb_cma_get_gem_obj(fb, 0); + gem = drm_fb_dma_get_gem_obj(fb, 0); - DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->paddr); + DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->dma_addr); /* Compute the start of the displayed memory */ bpp = fb->format->cpp[0]; - paddr = gem->paddr + fb->offsets[0]; + dma_addr = gem->dma_addr + fb->offsets[0]; /* Fixup framebuffer address for src coordinates */ - paddr += (state->src.x1 >> 16) * bpp; - paddr += (state->src.y1 >> 16) * fb->pitches[0]; + dma_addr += (state->src.x1 >> 16) * bpp; + dma_addr += (state->src.y1 >> 16) * fb->pitches[0]; /* Set the line width */ DRM_DEBUG_DRIVER("Layer line width: %d bytes\n", fb->pitches[0]); @@ -219,11 +218,11 @@ static int sun8i_ui_layer_update_buffer(struct sun8i_mixer *mixer, int channel, SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch_base, overlay), fb->pitches[0]); - DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr); + DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &dma_addr); regmap_write(mixer->engine.regs, SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch_base, overlay), - lower_32_bits(paddr)); + lower_32_bits(dma_addr)); return 0; } @@ -246,8 +245,8 @@ static int sun8i_ui_layer_atomic_check(struct drm_plane *plane, if (WARN_ON(!crtc_state)) return -EINVAL; - min_scale = DRM_PLANE_HELPER_NO_SCALING; - max_scale = DRM_PLANE_HELPER_NO_SCALING; + min_scale = DRM_PLANE_NO_SCALING; + max_scale = DRM_PLANE_NO_SCALING; if (layer->mixer->cfg->scaler_mask & BIT(layer->channel)) { min_scale = SUN8I_UI_SCALER_SCALE_MIN; diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 1fee6499bdd3..f9c0a56d3a14 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -7,11 +7,10 @@ #include <drm/drm_atomic_helper.h> #include <drm/drm_blend.h> #include <drm/drm_crtc.h> -#include <drm/drm_fb_cma_helper.h> +#include <drm/drm_fb_dma_helper.h> #include <drm/drm_framebuffer.h> #include <drm/drm_gem_atomic_helper.h> -#include <drm/drm_gem_cma_helper.h> -#include <drm/drm_plane_helper.h> +#include <drm/drm_gem_dma_helper.h> #include <drm/drm_probe_helper.h> #include "sun8i_csc.h" @@ -309,9 +308,9 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; const struct drm_format_info *format = fb->format; - struct drm_gem_cma_object *gem; + struct drm_gem_dma_object *gem; u32 dx, dy, src_x, src_y; - dma_addr_t paddr; + dma_addr_t dma_addr; u32 ch_base; int i; @@ -323,12 +322,12 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, for (i = 0; i < format->num_planes; i++) { /* Get the physical address of the buffer in memory */ - gem = drm_fb_cma_get_gem_obj(fb, i); + gem = drm_fb_dma_get_gem_obj(fb, i); - DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->paddr); + DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->dma_addr); /* Compute the start of the displayed memory */ - paddr = gem->paddr + fb->offsets[i]; + dma_addr = gem->dma_addr + fb->offsets[i]; dx = src_x; dy = src_y; @@ -339,8 +338,8 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, } /* Fixup framebuffer address for src coordinates */ - paddr += dx * format->cpp[i]; - paddr += dy * fb->pitches[i]; + dma_addr += dx * format->cpp[i]; + dma_addr += dy * fb->pitches[i]; /* Set the line width */ DRM_DEBUG_DRIVER("Layer %d. line width: %d bytes\n", @@ -351,12 +350,12 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, fb->pitches[i]); DRM_DEBUG_DRIVER("Setting %d. buffer address to %pad\n", - i + 1, &paddr); + i + 1, &dma_addr); regmap_write(mixer->engine.regs, SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(ch_base, overlay, i), - lower_32_bits(paddr)); + lower_32_bits(dma_addr)); } return 0; @@ -380,8 +379,8 @@ static int sun8i_vi_layer_atomic_check(struct drm_plane *plane, if (WARN_ON(!crtc_state)) return -EINVAL; - min_scale = DRM_PLANE_HELPER_NO_SCALING; - max_scale = DRM_PLANE_HELPER_NO_SCALING; + min_scale = DRM_PLANE_NO_SCALING; + max_scale = DRM_PLANE_NO_SCALING; if (layer->mixer->cfg->scaler_mask & BIT(layer->channel)) { min_scale = SUN8I_VI_SCALER_SCALE_MIN; |