diff options
Diffstat (limited to 'drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c')
| -rw-r--r-- | drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c | 60 |
1 files changed, 28 insertions, 32 deletions
diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c index 354705f9bc49..73c0f41df8d8 100644 --- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c +++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c @@ -1,7 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-only -/* - * aQuantia Corporation Network Driver - * Copyright (C) 2014-2019 aQuantia Corporation. All rights reserved +/* Atlantic Network Driver + * + * Copyright (C) 2014-2019 aQuantia Corporation + * Copyright (C) 2019-2020 Marvell International Ltd. */ /* File hw_atl_utils.c: Definition of common functions for Atlantic hardware @@ -53,7 +54,6 @@ enum mcp_area { MCP_AREA_SETTINGS = 0x20000000, }; -static int hw_atl_utils_ver_match(u32 ver_expected, u32 ver_actual); static int hw_atl_utils_mpi_set_state(struct aq_hw_s *self, enum hal_atl_utils_fw_state_e state); static u32 hw_atl_utils_get_mpi_mbox_tid(struct aq_hw_s *self); @@ -67,14 +67,10 @@ int hw_atl_utils_initfw(struct aq_hw_s *self, const struct aq_fw_ops **fw_ops) { int err = 0; - err = hw_atl_utils_soft_reset(self); - if (err) - return err; - hw_atl_utils_hw_chip_features_init(self, &self->chip_features); - hw_atl_utils_get_fw_version(self, &self->fw_ver_actual); + self->fw_ver_actual = hw_atl_utils_get_fw_version(self); if (hw_atl_utils_ver_match(HW_ATL_FW_VER_1X, self->fw_ver_actual) == 0) { @@ -313,7 +309,7 @@ int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a, for (++cnt; --cnt && !err;) { aq_hw_write_reg(self, HW_ATL_MIF_CMD, 0x00008000U); - if (IS_CHIP_FEATURE(REVISION_B1)) + if (ATL_HW_IS_CHIP_FEATURE(self, REVISION_B1)) err = readx_poll_timeout_atomic(hw_atl_utils_mif_addr_get, self, val, val != a, 1U, 1000U); @@ -409,7 +405,7 @@ static int hw_atl_utils_fw_upload_dwords(struct aq_hw_s *self, u32 addr, u32 *p, if (err < 0) goto err_exit; - if (IS_CHIP_FEATURE(REVISION_B1)) + if (ATL_HW_IS_CHIP_FEATURE(self, REVISION_B1)) err = hw_atl_utils_write_b1_mbox(self, addr, p, cnt, area); else err = hw_atl_utils_write_b0_mbox(self, addr, p, cnt); @@ -438,7 +434,7 @@ int hw_atl_write_fwsettings_dwords(struct aq_hw_s *self, u32 offset, u32 *p, p, cnt, MCP_AREA_SETTINGS); } -static int hw_atl_utils_ver_match(u32 ver_expected, u32 ver_actual) +int hw_atl_utils_ver_match(u32 ver_expected, u32 ver_actual) { const u32 dw_major_mask = 0xff000000U; const u32 dw_minor_mask = 0x00ffffffU; @@ -501,7 +497,7 @@ int hw_atl_utils_fw_rpc_call(struct aq_hw_s *self, unsigned int rpc_size) struct aq_hw_atl_utils_fw_rpc_tid_s sw; int err = 0; - if (!IS_CHIP_FEATURE(MIPS)) { + if (!ATL_HW_IS_CHIP_FEATURE(self, MIPS)) { err = -1; goto err_exit; } @@ -607,7 +603,7 @@ void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self, if (err < 0) goto err_exit; - if (IS_CHIP_FEATURE(REVISION_A0)) { + if (ATL_HW_IS_CHIP_FEATURE(self, REVISION_A0)) { unsigned int mtu = self->aq_nic_cfg ? self->aq_nic_cfg->mtu : 1514U; pmbox->stats.ubrc = pmbox->stats.uprc * mtu; @@ -692,7 +688,7 @@ int hw_atl_utils_mpi_get_link_status(struct aq_hw_s *self) link_status->mbps = 5000U; break; - case HAL_ATLANTIC_RATE_2GS: + case HAL_ATLANTIC_RATE_2G5: link_status->mbps = 2500U; break; @@ -806,22 +802,24 @@ void hw_atl_utils_hw_chip_features_init(struct aq_hw_s *self, u32 *p) u32 mif_rev = val & 0xFFU; u32 chip_features = 0U; + chip_features |= ATL_HW_CHIP_ATLANTIC; + if ((0xFU & mif_rev) == 1U) { - chip_features |= HAL_ATLANTIC_UTILS_CHIP_REVISION_A0 | - HAL_ATLANTIC_UTILS_CHIP_MPI_AQ | - HAL_ATLANTIC_UTILS_CHIP_MIPS; + chip_features |= ATL_HW_CHIP_REVISION_A0 | + ATL_HW_CHIP_MPI_AQ | + ATL_HW_CHIP_MIPS; } else if ((0xFU & mif_rev) == 2U) { - chip_features |= HAL_ATLANTIC_UTILS_CHIP_REVISION_B0 | - HAL_ATLANTIC_UTILS_CHIP_MPI_AQ | - HAL_ATLANTIC_UTILS_CHIP_MIPS | - HAL_ATLANTIC_UTILS_CHIP_TPO2 | - HAL_ATLANTIC_UTILS_CHIP_RPF2; + chip_features |= ATL_HW_CHIP_REVISION_B0 | + ATL_HW_CHIP_MPI_AQ | + ATL_HW_CHIP_MIPS | + ATL_HW_CHIP_TPO2 | + ATL_HW_CHIP_RPF2; } else if ((0xFU & mif_rev) == 0xAU) { - chip_features |= HAL_ATLANTIC_UTILS_CHIP_REVISION_B1 | - HAL_ATLANTIC_UTILS_CHIP_MPI_AQ | - HAL_ATLANTIC_UTILS_CHIP_MIPS | - HAL_ATLANTIC_UTILS_CHIP_TPO2 | - HAL_ATLANTIC_UTILS_CHIP_RPF2; + chip_features |= ATL_HW_CHIP_REVISION_B1 | + ATL_HW_CHIP_MPI_AQ | + ATL_HW_CHIP_MIPS | + ATL_HW_CHIP_TPO2 | + ATL_HW_CHIP_RPF2; } *p = chip_features; @@ -919,11 +917,9 @@ int hw_atl_utils_hw_get_regs(struct aq_hw_s *self, return 0; } -int hw_atl_utils_get_fw_version(struct aq_hw_s *self, u32 *fw_version) +u32 hw_atl_utils_get_fw_version(struct aq_hw_s *self) { - *fw_version = aq_hw_read_reg(self, 0x18U); - - return 0; + return aq_hw_read_reg(self, HW_ATL_MPI_FW_VERSION); } static int aq_fw1x_set_wake_magic(struct aq_hw_s *self, bool wol_enabled, |