aboutsummaryrefslogtreecommitdiffstatshomepage
path: root/drivers/pinctrl/nuvoton/pinctrl-ma35.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/pinctrl/nuvoton/pinctrl-ma35.c')
-rw-r--r--drivers/pinctrl/nuvoton/pinctrl-ma35.c120
1 files changed, 56 insertions, 64 deletions
diff --git a/drivers/pinctrl/nuvoton/pinctrl-ma35.c b/drivers/pinctrl/nuvoton/pinctrl-ma35.c
index 59c4e7c6cdde..06ae1fe8b8c5 100644
--- a/drivers/pinctrl/nuvoton/pinctrl-ma35.c
+++ b/drivers/pinctrl/nuvoton/pinctrl-ma35.c
@@ -98,12 +98,6 @@ static const u32 ds_3300mv_tbl[] = {
17100, 25600, 34100, 42800, 48000, 56000, 77000, 82000,
};
-struct ma35_pin_func {
- const char *name;
- const char **groups;
- u32 ngroups;
-};
-
struct ma35_pin_setting {
u32 offset;
u32 shift;
@@ -112,13 +106,6 @@ struct ma35_pin_setting {
unsigned int nconfigs;
};
-struct ma35_pin_group {
- const char *name;
- unsigned int npins;
- unsigned int *pins;
- struct ma35_pin_setting *settings;
-};
-
struct ma35_pin_bank {
void __iomem *reg_base;
struct clk *clk;
@@ -147,9 +134,9 @@ struct ma35_pinctrl {
struct pinctrl_dev *pctl;
const struct ma35_pinctrl_soc_info *info;
struct regmap *regmap;
- struct ma35_pin_group *groups;
+ struct group_desc *groups;
unsigned int ngroups;
- struct ma35_pin_func *functions;
+ struct pinfunction *functions;
unsigned int nfunctions;
};
@@ -166,7 +153,7 @@ static const char *ma35_get_group_name(struct pinctrl_dev *pctldev, unsigned int
{
struct ma35_pinctrl *npctl = pinctrl_dev_get_drvdata(pctldev);
- return npctl->groups[selector].name;
+ return npctl->groups[selector].grp.name;
}
static int ma35_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selector,
@@ -177,19 +164,19 @@ static int ma35_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selecto
if (selector >= npctl->ngroups)
return -EINVAL;
- *pins = npctl->groups[selector].pins;
- *npins = npctl->groups[selector].npins;
+ *pins = npctl->groups[selector].grp.pins;
+ *npins = npctl->groups[selector].grp.npins;
return 0;
}
-static struct ma35_pin_group *ma35_pinctrl_find_group_by_name(
- const struct ma35_pinctrl *npctl, const char *name)
+static struct group_desc *
+ma35_pinctrl_find_group_by_name(const struct ma35_pinctrl *npctl, const char *name)
{
int i;
for (i = 0; i < npctl->ngroups; i++) {
- if (!strcmp(npctl->groups[i].name, name))
+ if (!strcmp(npctl->groups[i].grp.name, name))
return &npctl->groups[i];
}
return NULL;
@@ -201,9 +188,10 @@ static int ma35_pinctrl_dt_node_to_map_func(struct pinctrl_dev *pctldev,
unsigned int *num_maps)
{
struct ma35_pinctrl *npctl = pinctrl_dev_get_drvdata(pctldev);
- struct ma35_pin_group *grp;
+ struct ma35_pin_setting *setting;
struct pinctrl_map *new_map;
struct device_node *parent;
+ struct group_desc *grp;
int map_num = 1;
int i;
@@ -217,7 +205,7 @@ static int ma35_pinctrl_dt_node_to_map_func(struct pinctrl_dev *pctldev,
return -EINVAL;
}
- map_num += grp->npins;
+ map_num += grp->grp.npins;
new_map = kcalloc(map_num, sizeof(*new_map), GFP_KERNEL);
if (!new_map)
return -ENOMEM;
@@ -229,17 +217,19 @@ static int ma35_pinctrl_dt_node_to_map_func(struct pinctrl_dev *pctldev,
if (!parent)
return -EINVAL;
+ setting = grp->data;
+
new_map[0].type = PIN_MAP_TYPE_MUX_GROUP;
new_map[0].data.mux.function = parent->name;
new_map[0].data.mux.group = np->name;
of_node_put(parent);
new_map++;
- for (i = 0; i < grp->npins; i++) {
+ for (i = 0; i < grp->grp.npins; i++) {
new_map[i].type = PIN_MAP_TYPE_CONFIGS_PIN;
- new_map[i].data.configs.group_or_pin = pin_get_name(pctldev, grp->pins[i]);
- new_map[i].data.configs.configs = grp->settings[i].configs;
- new_map[i].data.configs.num_configs = grp->settings[i].nconfigs;
+ new_map[i].data.configs.group_or_pin = pin_get_name(pctldev, grp->grp.pins[i]);
+ new_map[i].data.configs.configs = setting[i].configs;
+ new_map[i].data.configs.num_configs = setting[i].nconfigs;
}
dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n",
(*map)->data.mux.function, (*map)->data.mux.group, map_num);
@@ -287,14 +277,14 @@ static int ma35_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int selecto
unsigned int group)
{
struct ma35_pinctrl *npctl = pinctrl_dev_get_drvdata(pctldev);
- struct ma35_pin_group *grp = &npctl->groups[group];
- struct ma35_pin_setting *setting = grp->settings;
+ struct group_desc *grp = &npctl->groups[group];
+ struct ma35_pin_setting *setting = grp->data;
u32 i, regval;
dev_dbg(npctl->dev, "enable function %s group %s\n",
- npctl->functions[selector].name, npctl->groups[group].name);
+ npctl->functions[selector].name, grp->grp.name);
- for (i = 0; i < grp->npins; i++) {
+ for (i = 0; i < grp->grp.npins; i++) {
regmap_read(npctl->regmap, setting->offset, &regval);
regval &= ~GENMASK(setting->shift + MA35_MFP_BITS_PER_PORT - 1,
setting->shift);
@@ -529,7 +519,6 @@ static int ma35_gpiolib_register(struct platform_device *pdev, struct ma35_pinct
bank->irqtype = 0;
bank->irqinten = 0;
bank->chip.label = bank->name;
- bank->chip.of_gpio_n_cells = 2;
bank->chip.parent = &pdev->dev;
bank->chip.request = ma35_gpio_core_to_request;
bank->chip.direction_input = ma35_gpio_core_direction_in;
@@ -986,22 +975,22 @@ static const struct pinconf_ops ma35_pinconf_ops = {
.is_generic = true,
};
-static int ma35_pinctrl_parse_groups(struct device_node *np, struct ma35_pin_group *grp,
+static int ma35_pinctrl_parse_groups(struct fwnode_handle *fwnode, struct group_desc *grp,
struct ma35_pinctrl *npctl, u32 index)
{
+ struct device_node *np = to_of_node(fwnode);
struct ma35_pin_setting *pin;
unsigned long *configs;
unsigned int nconfigs;
+ unsigned int *pins;
int i, j, count, ret;
u32 *elems;
- grp->name = np->name;
-
ret = pinconf_generic_parse_dt_config(np, NULL, &configs, &nconfigs);
if (ret)
return ret;
- count = of_property_count_elems_of_size(np, "nuvoton,pins", sizeof(u32));
+ count = fwnode_property_count_u32(fwnode, "nuvoton,pins");
if (!count || count % 3)
return -EINVAL;
@@ -1009,21 +998,22 @@ static int ma35_pinctrl_parse_groups(struct device_node *np, struct ma35_pin_gro
if (!elems)
return -ENOMEM;
- ret = of_property_read_u32_array(np, "nuvoton,pins", elems, count);
+ grp->grp.name = np->name;
+
+ ret = fwnode_property_read_u32_array(fwnode, "nuvoton,pins", elems, count);
if (ret)
return -EINVAL;
+ grp->grp.npins = count / 3;
- grp->npins = count / 3;
-
- grp->pins = devm_kcalloc(npctl->dev, grp->npins, sizeof(*grp->pins), GFP_KERNEL);
- if (!grp->pins)
+ pins = devm_kcalloc(npctl->dev, grp->grp.npins, sizeof(*pins), GFP_KERNEL);
+ if (!pins)
return -ENOMEM;
+ grp->grp.pins = pins;
- grp->settings = devm_kcalloc(npctl->dev, grp->npins, sizeof(*grp->settings), GFP_KERNEL);
- if (!grp->settings)
+ pin = devm_kcalloc(npctl->dev, grp->grp.npins, sizeof(*pin), GFP_KERNEL);
+ if (!pin)
return -ENOMEM;
-
- pin = grp->settings;
+ grp->data = pin;
for (i = 0, j = 0; i < count; i += 3, j++) {
pin->offset = elems[i] * MA35_MFP_REG_SZ_PER_BANK + MA35_MFP_REG_BASE;
@@ -1031,19 +1021,21 @@ static int ma35_pinctrl_parse_groups(struct device_node *np, struct ma35_pin_gro
pin->muxval = elems[i + 2];
pin->configs = configs;
pin->nconfigs = nconfigs;
- grp->pins[j] = npctl->info->get_pin_num(pin->offset, pin->shift);
+ pins[j] = npctl->info->get_pin_num(pin->offset, pin->shift);
pin++;
}
return 0;
}
-static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinctrl *npctl,
+static int ma35_pinctrl_parse_functions(struct fwnode_handle *fwnode, struct ma35_pinctrl *npctl,
u32 index)
{
- struct device_node *child;
- struct ma35_pin_func *func;
- struct ma35_pin_group *grp;
+ struct device_node *np = to_of_node(fwnode);
+ struct fwnode_handle *child;
+ struct pinfunction *func;
+ struct group_desc *grp;
static u32 grp_index;
+ const char **groups;
u32 ret, i = 0;
dev_dbg(npctl->dev, "parse function(%d): %s\n", index, np->name);
@@ -1055,31 +1047,34 @@ static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinc
if (func->ngroups <= 0)
return 0;
- func->groups = devm_kcalloc(npctl->dev, func->ngroups, sizeof(char *), GFP_KERNEL);
- if (!func->groups)
+ groups = devm_kcalloc(npctl->dev, func->ngroups, sizeof(*groups), GFP_KERNEL);
+ if (!groups)
return -ENOMEM;
- for_each_child_of_node(np, child) {
- func->groups[i] = child->name;
+ fwnode_for_each_child_node(fwnode, child) {
+ struct device_node *node = to_of_node(child);
+
+ groups[i] = node->name;
grp = &npctl->groups[grp_index++];
ret = ma35_pinctrl_parse_groups(child, grp, npctl, i++);
if (ret) {
- of_node_put(child);
+ fwnode_handle_put(child);
return ret;
}
}
+
+ func->groups = groups;
return 0;
}
static int ma35_pinctrl_probe_dt(struct platform_device *pdev, struct ma35_pinctrl *npctl)
{
+ struct device *dev = &pdev->dev;
struct fwnode_handle *child;
u32 idx = 0;
int ret;
- device_for_each_child_node(&pdev->dev, child) {
- if (fwnode_property_present(child, "gpio-controller"))
- continue;
+ for_each_gpiochip_node(dev, child) {
npctl->nfunctions++;
npctl->ngroups += of_get_child_count(to_of_node(child));
}
@@ -1097,11 +1092,8 @@ static int ma35_pinctrl_probe_dt(struct platform_device *pdev, struct ma35_pinct
if (!npctl->groups)
return -ENOMEM;
- device_for_each_child_node(&pdev->dev, child) {
- if (fwnode_property_present(child, "gpio-controller"))
- continue;
-
- ret = ma35_pinctrl_parse_functions(to_of_node(child), npctl, idx++);
+ for_each_gpiochip_node(dev, child) {
+ ret = ma35_pinctrl_parse_functions(child, npctl, idx++);
if (ret) {
fwnode_handle_put(child);
dev_err(&pdev->dev, "failed to parse function\n");
@@ -1146,7 +1138,7 @@ int ma35_pinctrl_probe(struct platform_device *pdev, const struct ma35_pinctrl_s
npctl->info = info;
npctl->dev = &pdev->dev;
- npctl->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "nuvoton,sys");
+ npctl->regmap = syscon_regmap_lookup_by_phandle(dev_of_node(dev), "nuvoton,sys");
if (IS_ERR(npctl->regmap))
return dev_err_probe(&pdev->dev, PTR_ERR(npctl->regmap),
"No syscfg phandle specified\n");
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.