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path: root/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
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Diffstat (limited to 'drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c')
-rw-r--r--drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c39
1 files changed, 12 insertions, 27 deletions
diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
index d09a5e9b2eca..be3db8ab406c 100644
--- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
+++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
@@ -587,17 +587,6 @@ static const int hgpio5_pins[] = { 25 };
static const int hgpio6_pins[] = { 59 };
static const int hgpio7_pins[] = { 60 };
-/*
- * pin: name, number
- * group: name, npins, pins
- * function: name, ngroups, groups
- */
-struct npcm8xx_pingroup {
- const char *name;
- const unsigned int *pins;
- int npins;
-};
-
#define NPCM8XX_GRPS \
NPCM8XX_GRP(gpi36), \
NPCM8XX_GRP(gpi35), \
@@ -829,22 +818,14 @@ enum {
#undef NPCM8XX_GRP
};
-static struct npcm8xx_pingroup npcm8xx_pingroups[] = {
-#define NPCM8XX_GRP(x) { .name = #x, .pins = x ## _pins, \
- .npins = ARRAY_SIZE(x ## _pins) }
+static struct pingroup npcm8xx_pingroups[] = {
+#define NPCM8XX_GRP(x) PINCTRL_PINGROUP(#x, x ## _pins, ARRAY_SIZE(x ## _pins))
NPCM8XX_GRPS
#undef NPCM8XX_GRP
};
#define NPCM8XX_SFUNC(a) NPCM8XX_FUNC(a, #a)
#define NPCM8XX_FUNC(a, b...) static const char *a ## _grp[] = { b }
-#define NPCM8XX_MKFUNC(nm) { .name = #nm, .ngroups = ARRAY_SIZE(nm ## _grp), \
- .groups = nm ## _grp }
-struct npcm8xx_func {
- const char *name;
- const unsigned int ngroups;
- const char *const *groups;
-};
NPCM8XX_SFUNC(gpi36);
NPCM8XX_SFUNC(gpi35);
@@ -1067,7 +1048,8 @@ NPCM8XX_SFUNC(hgpio6);
NPCM8XX_SFUNC(hgpio7);
/* Function names */
-static struct npcm8xx_func npcm8xx_funcs[] = {
+static struct pinfunction npcm8xx_funcs[] = {
+#define NPCM8XX_MKFUNC(nm) PINCTRL_PINFUNCTION(#nm, nm ## _grp, ARRAY_SIZE(nm ## _grp))
NPCM8XX_MKFUNC(gpi36),
NPCM8XX_MKFUNC(gpi35),
NPCM8XX_MKFUNC(tp_jtag3),
@@ -1287,15 +1269,18 @@ static struct npcm8xx_func npcm8xx_funcs[] = {
NPCM8XX_MKFUNC(hgpio5),
NPCM8XX_MKFUNC(hgpio6),
NPCM8XX_MKFUNC(hgpio7),
+#undef NPCM8XX_MKFUNC
};
#define NPCM8XX_PINCFG(a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p, q) \
- [a] { .fn0 = fn_ ## b, .reg0 = NPCM8XX_GCR_ ## c, .bit0 = d, \
+ [a] = { \
+ .flag = q, \
+ .fn0 = fn_ ## b, .reg0 = NPCM8XX_GCR_ ## c, .bit0 = d, \
.fn1 = fn_ ## e, .reg1 = NPCM8XX_GCR_ ## f, .bit1 = g, \
.fn2 = fn_ ## h, .reg2 = NPCM8XX_GCR_ ## i, .bit2 = j, \
.fn3 = fn_ ## k, .reg3 = NPCM8XX_GCR_ ## l, .bit3 = m, \
.fn4 = fn_ ## n, .reg4 = NPCM8XX_GCR_ ## o, .bit4 = p, \
- .flag = q }
+ }
/* Drive strength controlled by NPCM8XX_GP_N_ODSC */
#define DRIVE_STRENGTH_LO_SHIFT 8
@@ -2361,8 +2346,8 @@ static int npcm8xx_gpio_fw(struct npcm8xx_pinctrl *pctrl)
return dev_err_probe(dev, ret, "gpio-ranges fail for GPIO bank %u\n", id);
ret = fwnode_irq_get(child, 0);
- if (!ret)
- return dev_err_probe(dev, ret, "No IRQ for GPIO bank %u\n", id);
+ if (ret < 0)
+ return dev_err_probe(dev, ret, "Failed to retrieve IRQ for bank %u\n", id);
pctrl->gpio_bank[id].irq = ret;
pctrl->gpio_bank[id].irq_chip = npcmgpio_irqchip;
@@ -2439,7 +2424,7 @@ static int npcm8xx_pinctrl_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, pctrl);
pctrl->gcr_regmap =
- syscon_regmap_lookup_by_phandle(dev->of_node, "nuvoton,sysgcr");
+ syscon_regmap_lookup_by_phandle(dev_of_node(dev), "nuvoton,sysgcr");
if (IS_ERR(pctrl->gcr_regmap))
return dev_err_probe(dev, PTR_ERR(pctrl->gcr_regmap),
"Failed to find nuvoton,sysgcr property\n");