diff options
Diffstat (limited to 'drivers/staging/media/atomisp/pci/sh_css_internal.h')
-rw-r--r-- | drivers/staging/media/atomisp/pci/sh_css_internal.h | 99 |
1 files changed, 42 insertions, 57 deletions
diff --git a/drivers/staging/media/atomisp/pci/sh_css_internal.h b/drivers/staging/media/atomisp/pci/sh_css_internal.h index 5f271d9ae485..5c25a25dce92 100644 --- a/drivers/staging/media/atomisp/pci/sh_css_internal.h +++ b/drivers/staging/media/atomisp/pci/sh_css_internal.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Support for Intel Camera Imaging ISP subsystem. * Copyright (c) 2015, Intel Corporation. @@ -75,11 +76,7 @@ #define SH_CSS_REF_BIT_DEPTH 8 /* keep next up to date with the definition for MAX_CB_ELEMS_FOR_TAGGER in tagger.sp.c */ -#if defined(HAS_SP_2400) #define NUM_CONTINUOUS_FRAMES 15 -#else -#define NUM_CONTINUOUS_FRAMES 10 -#endif #define NUM_MIPI_FRAMES_PER_STREAM 2 #define NUM_ONLINE_INIT_CONTINUOUS_FRAMES 2 @@ -209,28 +206,28 @@ enum sh_css_sp_event_type { }; /* xmem address map allocation per pipeline, css pointers */ -/* Note that the struct below should only consist of hrt_vaddress-es +/* Note that the struct below should only consist of ia_css_ptr-es Otherwise this will cause a fail in the function ref_sh_css_ddr_address_map */ struct sh_css_ddr_address_map { - hrt_vaddress isp_param; - hrt_vaddress isp_mem_param[SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES]; - hrt_vaddress macc_tbl; - hrt_vaddress fpn_tbl; - hrt_vaddress sc_tbl; - hrt_vaddress tetra_r_x; - hrt_vaddress tetra_r_y; - hrt_vaddress tetra_gr_x; - hrt_vaddress tetra_gr_y; - hrt_vaddress tetra_gb_x; - hrt_vaddress tetra_gb_y; - hrt_vaddress tetra_b_x; - hrt_vaddress tetra_b_y; - hrt_vaddress tetra_ratb_x; - hrt_vaddress tetra_ratb_y; - hrt_vaddress tetra_batr_x; - hrt_vaddress tetra_batr_y; - hrt_vaddress dvs_6axis_params_y; + ia_css_ptr isp_param; + ia_css_ptr isp_mem_param[SH_CSS_MAX_STAGES][IA_CSS_NUM_MEMORIES]; + ia_css_ptr macc_tbl; + ia_css_ptr fpn_tbl; + ia_css_ptr sc_tbl; + ia_css_ptr tetra_r_x; + ia_css_ptr tetra_r_y; + ia_css_ptr tetra_gr_x; + ia_css_ptr tetra_gr_y; + ia_css_ptr tetra_gb_x; + ia_css_ptr tetra_gb_y; + ia_css_ptr tetra_b_x; + ia_css_ptr tetra_b_y; + ia_css_ptr tetra_ratb_x; + ia_css_ptr tetra_ratb_y; + ia_css_ptr tetra_batr_x; + ia_css_ptr tetra_batr_y; + ia_css_ptr dvs_6axis_params_y; }; #define SIZE_OF_SH_CSS_DDR_ADDRESS_MAP_STRUCT \ @@ -279,9 +276,9 @@ struct ia_css_isp_parameter_set_info { a binary. It depends on the binary which ones are used. */ struct sh_css_binary_args { struct ia_css_frame *in_frame; /* input frame */ - struct ia_css_frame + const struct ia_css_frame *delay_frames[MAX_NUM_VIDEO_DELAY_FRAMES]; /* reference input frame */ - struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; /* tnr frames */ + const struct ia_css_frame *tnr_frames[NUM_TNR_FRAMES]; /* tnr frames */ struct ia_css_frame *out_frame[IA_CSS_BINARY_MAX_OUTPUT_PORTS]; /* output frame */ struct ia_css_frame *out_vf_frame; /* viewfinder output frame */ @@ -531,8 +528,8 @@ struct sh_css_sp_pipeline { u32 port_id; /* port_id for input system */ u32 num_stages; /* the pipe config */ u32 running; /* needed for pipe termination */ - hrt_vaddress sp_stage_addr[SH_CSS_MAX_STAGES]; - hrt_vaddress scaler_pp_lut; /* Early bound LUT */ + ia_css_ptr sp_stage_addr[SH_CSS_MAX_STAGES]; + ia_css_ptr scaler_pp_lut; /* Early bound LUT */ u32 dummy; /* stage ptr is only used on sp but lives in this struct; needs cleanup */ s32 num_execs; /* number of times to run if this is @@ -544,7 +541,7 @@ struct sh_css_sp_pipeline { u32 height; /* Number of lines */ u32 stride; /* Stride (in bytes) per line */ u32 size; /* Total size (in bytes) */ - hrt_vaddress cont_buf; /* Address of continuous buffer */ + ia_css_ptr cont_buf; /* Address of continuous buffer */ } metadata; #endif #if defined(SH_CSS_ENABLE_PER_FRAME_PARAMS) @@ -657,9 +654,9 @@ struct sh_css_sp_stage { struct ia_css_frames_sp frames; struct ia_css_resolution dvs_envelope; struct sh_css_uds_info uds; - hrt_vaddress isp_stage_addr; - hrt_vaddress xmem_bin_addr; - hrt_vaddress xmem_map_addr; + ia_css_ptr isp_stage_addr; + ia_css_ptr xmem_bin_addr; + ia_css_ptr xmem_map_addr; u16 top_cropping; u16 row_stripes_height; @@ -692,7 +689,7 @@ struct sh_css_sp_group { /* Data in SP dmem that is set from the host every stage. */ struct sh_css_sp_per_frame_data { /* ddr address of sp_group and sp_stage */ - hrt_vaddress sp_group_addr; + ia_css_ptr sp_group_addr; }; #define SH_CSS_NUM_SDW_IRQS 3 @@ -728,25 +725,19 @@ struct sh_css_sp_output { * separate SP thread for this. */ #define IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE (2 * N_CSI_PORTS) -#if defined(HAS_SP_2400) #define IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE 13 #define IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE 19 #define IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE 26 /* holds events for all type of buffers, hence deeper */ -#else -#define IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE 6 -#define IA_CSS_NUM_ELEMS_SP2HOST_BUFFER_QUEUE 6 -#define IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE 6 -#endif struct sh_css_hmm_buffer { union { struct ia_css_isp_3a_statistics s3a; struct ia_css_isp_dvs_statistics dis; - hrt_vaddress skc_dvs_statistics; - hrt_vaddress lace_stat; + ia_css_ptr skc_dvs_statistics; + ia_css_ptr lace_stat; struct ia_css_metadata metadata; struct frame_data_wrapper { - hrt_vaddress frame_data; + ia_css_ptr frame_data; u32 flashed; u32 exp_id; u32 isp_parameters_id; /** Unique ID to track which config was @@ -755,7 +746,7 @@ struct sh_css_hmm_buffer { struct sh_css_config_on_frame_enqueue config_on_frame_enqueue; #endif } frame; - hrt_vaddress ddr_ptrs; + ia_css_ptr ddr_ptrs; } payload; /* * kernel_ptr is present for host administration purposes only. @@ -834,12 +825,12 @@ struct host_sp_communication { * TODO: * Remove it when the Host and the SP is decoupled. */ - hrt_vaddress host2sp_offline_frames[NUM_CONTINUOUS_FRAMES]; - hrt_vaddress host2sp_offline_metadata[NUM_CONTINUOUS_FRAMES]; + ia_css_ptr host2sp_offline_frames[NUM_CONTINUOUS_FRAMES]; + ia_css_ptr host2sp_offline_metadata[NUM_CONTINUOUS_FRAMES]; #if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401) - hrt_vaddress host2sp_mipi_frames[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM]; - hrt_vaddress host2sp_mipi_metadata[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM]; + ia_css_ptr host2sp_mipi_frames[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM]; + ia_css_ptr host2sp_mipi_metadata[N_CSI_PORTS][NUM_MIPI_FRAMES_PER_STREAM]; u32 host2sp_num_mipi_frames[N_CSI_PORTS]; #endif u32 host2sp_cont_avail_num_raw_frames; @@ -960,20 +951,14 @@ sh_css_vprint(const char *fmt, va_list args) issue with the firmware struct/union's. More permanent solution will be to refactor this include. */ -hrt_vaddress sh_css_params_ddr_address_map(void); +ia_css_ptr sh_css_params_ddr_address_map(void); -enum ia_css_err +int sh_css_params_init(void); void sh_css_params_uninit(void); -void *sh_css_malloc(size_t size); - -void *sh_css_calloc(size_t N, size_t size); - -void sh_css_free(void *ptr); - /* For Acceleration API: Flush FW (shared buffer pointer) arguments */ void sh_css_flush(struct ia_css_acc_fw *fw); @@ -1010,13 +995,13 @@ sh_css_get_mipi_sizes_for_check(const unsigned int port, #endif -hrt_vaddress +ia_css_ptr sh_css_store_sp_group_to_ddr(void); -hrt_vaddress +ia_css_ptr sh_css_store_sp_stage_to_ddr(unsigned int pipe, unsigned int stage); -hrt_vaddress +ia_css_ptr sh_css_store_isp_stage_to_ddr(unsigned int pipe, unsigned int stage); void |