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Pull "Amlogic drivers for v4.15" from Kevin Hilman:
- add SoC info driver for 32-bit Amlogic SoCs
* tag 'amlogic-drivers' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
soc: amlogic: Add Meson6/Meson8/Meson8b/Meson8m2 SoC Information driver
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Pull "Qualcomm ARM Based Driver Updates for v4.15 Part 2" from Andy Gross:
* Add Qualcomm Remote Filesystem Memory driver
* Add OF linkage for RMTFS
* tag 'qcom-drivers-for-4.15-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux:
soc: qcom: Remote filesystem memory driver
dt-binding: soc: qcom: Add binding for rmtfs memory
of: reserved_mem: Accessor for acquiring reserved_mem
of/platform: Generalize /reserved-memory handling
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Pull "Keystone SOC for 4.15" from Santosh Shilimkar
* tag 'keystone_soc_drivers_4.15' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ti_sci: Use %pS printk format for direct addresses
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Pull "Broadcom drivers changes for 4.15 (part 2)" from Florian Fainelli:
This pull request contains Broadcom ARM/ARM64/MIPS SoCs changes for 4.15
(second part), please pull the following:
- Markus updates the Broadcom STB DPFE driver to avoid loading the firmware when
unnecessary to accomodate for specific platform restrictions
- Florian adds support for the Broadcom Hurricane 2 SoC iProc PLL clock needed
to get the proper CPU clock frequency
* tag 'arm-soc/for-4.15/drivers-part2' of http://github.com/Broadcom/stblinux:
clk: bcm: Add Broadcom Hurricane 2 clock support
memory: brcmstb: dpfe: skip downloading firmware when possible
memory: brcmstb: dpfe: introduce is_dcpu_enabled()
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Pull "thermal: tegra: Changes for v4.15-rc1" from Thierry Reding:
This contains the Tegra186 BPMP thermal driver. It is used to monitor
and access several thermal sensors found in the SoC.
* tag 'tegra-for-4.15-thermal' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
thermal: Add Tegra BPMP thermal sensor driver
dt-bindings: Add bindings for nvidia,tegra186-bpmp-thermal
dt-bindings: clock: tegra: Add sor1_out clock
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Pull "soc/tegra: Changes for v4.15-rc1" from Thierry Reding:
Contains a fix to the generic power domain driver to properly report
errors propagated from BPMP.
* tag 'tegra-for-4.15-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: bpmp: Check BPMP response return code
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Pull "firmware: tegra: Changes for v4.15-rc1" from Thierry Reding:
This contains a couple of (non-critical) fixes and improvements for the
BPMP driver as well as support for debugfs.
* tag 'tegra-for-4.15-firmware' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
firmware: tegra: Add BPMP debugfs support
firmware: tegra: Add stubs when BPMP not enabled
firmware: tegra: Expose tegra_bpmp_mrq_return()
firmware: tegra: Propagate error code to caller
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The Qualcomm remote file system protocol is used by certain remoteprocs,
in particular the modem, to read and write persistent storage in
platforms where only the application CPU has physical storage access.
The protocol is based on a set of QMI-encoded control-messages and a
shared memory buffer for exchaning the data. This driver implements the
latter, providing the user space service access to the carved out chunk
of memory.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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This adds the binding for describing shared memory used to exchange file
system blocks between the RMTFS client and service. A client for this is
generally found in the modem firmware and is used for accessing
persistent storage for things such as radio calibration.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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In some cases drivers referencing a reserved-memory region might want to
remap the entire region, but when defining the reserved-memory by "size"
the client driver has no means to know the associated base address of
the reserved memory region.
This patch adds an accessor for such drivers to acquire a handle to
their associated reserved-memory for this purpose.
A complicating factor for the implementation is that the reserved_mem
objects are created from the flattened DeviceTree, as such we can't
use the device_node address for comparison. Fortunately the name of the
node will be used as "name" of the reserved_mem and will be used when
building the full_name, so we can compare the "name" with the basename
of the full_name to find the match.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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By iterating over all /reserved-memory child nodes and match each one to
a list of compatibles that we want to treat specially, we can easily
extend the list of compatibles to handle - without having to resort to
of_platform_populate() that would create unnecessary platform_devices.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Pull "FSL/NXP ARM SoC drivers updates for 4.14" from Li Yang:
This adds the DPAA QBMan support for ARM SoCs and a few minor fixes/updates.
This pull request includes updates to the QMAN/BMAN drivers to make
them work on the arm/arm64 architectures in addition to the power
architecture and a few minor update/bug-fix to the soc/fsl drivers.
We got the Reviewed-by from Catalin on the ARM architecture side.
DPAA (Data Path Acceleration Architecture) is a set of hardware
components used on some FSL/NXP QorIQ Networking SoCs, it provides the
infrastructure to support simplified sharing of networking interfaces
and accelerators by multiple CPU cores, and the accelerators
themselves. The QMan(Queue Manager) and BMan(Buffer Manager) are
infrastructural components within the DPAA framework. They are used to
manage queues and buffers for various I/O interfaces, hardware
accelerators.
* tag 'soc-fsl-for-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
soc/fsl/qbman: Enable FSL_LAYERSCAPE config on ARM
soc/fsl/qbman: Add missing headers on ARM
soc/fsl/qbman: different register offsets on ARM
soc/fsl/qbman: add QMAN_REV32
soc/fsl/qbman: Rework portal mapping calls for ARM/PPC
soc/fsl/qbman: Fix ARM32 typo
soc/fsl/qbman: Drop L1_CACHE_BYTES compile time check
soc/fsl/qbman: Drop set/clear_bits usage
dt-bindings: soc/fsl: Update reserved memory binding for QBMan
soc/fsl/qbman: Use shared-dma-pool for QMan private memory allocations
soc/fsl/qbman: Use shared-dma-pool for BMan private memory allocations
soc/fsl/qbman: Add common routine for QBMan private allocations
soc/fsl/guts: Add compatible string for LS1088
soc/fsl/qman: Sleep instead of stuck hacking jiffies
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Pull "Reset controller changes for v4.15" from Philipp Zabel:
- add ARC AX10x support,
merged from a separate branch that is also included in the ARC tree
- add Stratix10 support via socfpga
- unify socfpga, stm32, sunxi, and zx2967 into simple-reset driver
- add Meson GX reset level control and remove an unneeded check
- add Uniphier PXs3 and ethernet reset controls
- add MT7622 reset control dt-bindings header
* tag 'reset-for-4.15' of git://git.pengutronix.de/git/pza/linux:
reset: zx2967: use the reset-simple driver
reset: stm32: use the reset-simple driver
reset: socfpga: use the reset-simple driver
reset: sunxi: use reset-simple driver
reset: add reset-simple to unify socfpga, stm32, sunxi, and zx2967
reset: meson: remove unneeded check in meson_reset_reset
reset: meson: add level reset support for GX SoC family
reset: uniphier: add PXs3 reset data
reset: mediatek: add reset controller dt-bindings required header for MT7622 SoC
reset: socfpga: build the reset-socfpga for Stratix10 SOC
reset: uniphier: add ethernet reset control support
reset: socfpga: fix for 64-bit compilation
ARC: reset: introduce AXS10x reset driver
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Pull "OMAP-GPMC: driver updates for v4.15" from Roger Quadros:
* get rid of unused field in platform data structure.
* tag 'gpmc-omap-for-v4.15' of https://github.com/rogerq/linux:
memory: omap-gpmc: Drop gpmc_status
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Pull "Qualcomm ARM Based Driver Updates for v4.15" from Andy Gross:
* Add SCM firmware APIs for download mode and secure IO service
* Add SMEM support for cached entries
* Add SMEM support for global partition, dynamic item limit, and more hosts
* tag 'qcom-drivers-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
firmware: qcom: scm: Expose download-mode control
firmware: qcom: scm: Expose secure IO service
soc: qcom: smem: Increase the number of hosts
soc: qcom: smem: Support dynamic item limit
soc: qcom: smem: Support global partition
soc: qcom: smem: Read version from the smem header
soc: qcom: smem: Use le32_to_cpu for comparison
soc: qcom: smem: Support getting cached entries
soc: qcom: smem: Rename "uncached" accessors
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Pull "Samsung soc drivers changes for v4.15" from Krzysztof Kozłowski:
Remove of Exynos4212 related dead code (no more support for this SoC).
* tag 'samsung-drivers-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
soc: samsung: Remove Exynos4212 related dead code
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Pull "ARM SCPI updates/cleanups for v4.15" from Sudeep Holla:
1. Fixes to get rid of sparse warnings
2. Use of FIELD_GET and GENMASK for better subfields handling
3. Make mbox_free_channels device-managed helping in removing unnecessary code
4. Various other cleanups to simplify and improve code readability
* tag 'scpi-updates-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: arm_scpi: silence sparse warnings
firmware: arm_scpi: remove all single element structures
firmware: arm_scpi: drop unnecessary type cast to scpi_shared_mem
firmware: arm_scpi: improve struct sensor_value
firmware: arm_scpi: improve handling of protocol and firmware version subfields
firmware: arm_scpi: improve struct dvfs_info to make code better readable
firmware: arm_scpi: remove scpi_remove
firmware: arm_scpi: make freeing mbox channels device-managed
firmware: arm_scpi: pre-populate dvfs info in scpi_probe
firmware: arm_scpi: remove two unneeded devm_kfree's in scpi_remove
firmware: arm_scpi: remove usage of drvdata and don't reset scpi_info to null
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Pull "Renesas ARM Based SoC Drivers Updates for v4.15" from Simon Horman:
Add basic support for R-Car V3M (R8A77970) SoC.
Sergei Shtylyov says:
* Add support for R-Car V3M (R8A77970) SoC power areas to the R-Car SYSC
driver
* Add support for identifying the R-Car V3M (R8A77970) SoC
* Add support for R-Car V3M (R8A77970) to the R-Car RST driver -- this
driver is needed for the clock driver to work
* tag 'renesas-drivers-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: rcar-sysc: add R8A77970 support
soc: renesas: identify R-Car V3M
soc: renesas: rcar-rst: add R8A77970 support
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Pull "Broadcom drivers changes for 4.15" from Florian Fainelli:
This pull requests contains Broadcom SoCs drivers updates for 4.15, please pull
the following:
- Markus adds support for the Broadcom STB DDR PHY frontend which supports
dynamic firmware loading and offers the ability to respond with DRAM refresh
rates. He also adds a proper documentation binding document for that
peripheral
- Brian adds support for S2/S3/S5 system suspend/resume modes on ARM-based SoCs
which is not new but had been lingering for a long time.
- Justin adds S2/S3 system suspend/resume modes on MIPS-based SoCs which is a
bit new newer and builds on top of the ARM-based support.
- Florian adds Device Tree binding documents for both ARM and MIPS based systems
describing the necessary nodes for S2/S3/S5 on these SoCs.
(This pull request somehow missed the 4.14 merge window and is now being sent again
for 4.15 along with build fixes from Arnd).
* tag 'arm-soc/for-4.15/drivers' of http://github.com/Broadcom/stblinux:
soc bcm: brcmstb: Add support for S2/S3/S5 suspend states (MIPS)
dt-bindings: Document MIPS Broadcom STB power management nodes
soc: bcm: brcmstb: Add support for S2/S3/S5 suspend states (ARM)
dt-bindings: ARM: brcmstb: Update Broadcom STB Power Management binding
memory: brcmstb: Add driver for DPFE
dt-bindings: Add bindings for Broadcom STB DRAM Sensors
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Add checks for the return code in BPMP response messages.
Signed-off-by: Timo Alho <talho@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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On Tegra186, the BPMP (Boot and Power Management Processor) exposes an
interface to thermal sensors on the system-on-chip. This driver
implements access to the interface. It supports reading the
temperature, setting trip points and receiving notification of a
tripped trip point.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Tegra power management firmware running on the co-processor (BPMP)
implements a simple pseudo file system akin to debugfs. The file
system can be used for debugging purposes to examine and change the
status of selected resources controlled by the firmware (such as
clocks, resets, voltages, powergates, ...).
Add support to "mirror" the firmware's file system to debugfs. At
boot, query firmware for a list of all possible files and create
corresponding debugfs entries. Read/write of individual files is
implemented by sending a Message ReQuest (MRQ) that passes the full
file path name and data to firmware via DRAM.
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add static inline stubs to bpmp.h when CONFIG_BPMP is not enabled.
This allows building BPMP-related drivers with COMPILE_TEST.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Expose and export the tegra_bpmp_mrq_return() function for use by
drivers outside the core BPMP driver. This function is used to reply to
messages originating from the BPMP, which is required in the thermal
driver.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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In Tegra186, the BPMP (Boot and Power Management Processor) implements
an interface that is used to read system temperatures, including CPU
cluster and GPU temperatures. This binding describes the thermal sensor
that is exposed by BPMP.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Merge the AXS10x driver, which is also merged into
git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git for-next
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The reset-simple driver can be used without changes.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Alexandru Gagniuc <alex.g@adaptrum.com>
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The reset-simple driver can be used without changes.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Gabriel Fernandez <gabriel.fernandez@st.com>
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Add reset line status readback, inverted status support, and socfpga
device tree quirks to the simple reset driver, and use it to replace
the socfpga driver.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Use the newly created copies in the reset-simple driver to replace the
sunxi platform driver code and reset operations. The separate sunxi
driver still remains to register the early reset controllers, but it
reuses the reset operations in reset-simple.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
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Copy reusable parts from the sunxi driver, to add a driver for simple
reset controllers with reset lines that can be controlled by toggling
bits in exclusive, contiguous register ranges using read-modify-write
cycles under a spinlock.
The following patches will replace compatible reset drivers with
reset-simple, extending it where necessary.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
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This field is no longer used, drop it.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Roger Quadros <rogerq@ti.com>
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The sor1_src clock implemented on Tegra210 is modelled the wrong way
around, which causes some issues with HDMI and DP support. This clock
implementation is provided by BPMP on Tegra186, which models this in
a more correct way. Since this introduces incompatibilities between
the two SoC generations which we want to avoid, the Tegra210 will be
fixed in subsequent patches.
This change adds sor1_out as an alias for sor1_src.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The if (bank >= REG_COUNT) is not need since already checked
by the default rcdev->of_xlate implementation which guarantees that
id < rcdev->nr_resets.
Suggested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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The Amlogic GX SoC family embeds alternate registers to drive the reset
levels next to the pulse registers.
This patch adds support for level reset handling on the GX family only.
The Meson8 family has an alternate way to handle level reset.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Response messages from Tegra BPMP firmware contain an error return code
as the first word of payload. The error code is used to indicate
incorrectly formatted request message or use of non-existing resource
(clk, reset, powergate) identifier. Current implementation of
tegra_bpmp_transfer() ignores this code and does not pass it to caller.
Fix this by adding an extra struct member to tegra_bpmp_message and
populate that with return code.
Signed-off-by: Timo Alho <talho@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add support for the Broadcom Hurricane 2 SoC clock controller. We can
re-use the existing iProc clock library since the SoC's architecture is
largely the same as its predecessors. For now, we just initialize the
iProc ARM PLL.
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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In order to aid post-mortem debugging the Qualcomm platforms provide a
"memory download mode", where the boot loader will provide an interface
for custom tools to "download" the content of RAM to a host machine.
The mode is triggered by writing a magic value somewhere in RAM, that is
read in the boot code path after a warm-restart. Two mechanism for
setting this magic value are supported in modern platforms; a direct SCM
call to enable the mode or through a secure io write of a magic value.
In order for a normal reboot not to trigger "download mode" the magic
must be cleared during a clean reboot.
Download mode has to be enabled by including qcom_scm.download_mode=1 on
the command line.
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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The secure IO service provides operations for reading and writing secure
memory from non-secure mode, expose this API through SCM.
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Increase the maximum number of hosts in a system to 10.
Signed-off-by: Chris Lew <clew@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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In V12 SMEM, SBL writes SMEM parameter information after the TOC. Use
the SBL provided item count as the max item number.
Signed-off-by: Chris Lew <clew@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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SMEM V12 creates a global partition to allocate global smem items from
instead of a global heap. The global partition has the same structure as
a private partition.
Signed-off-by: Chris Lew <clew@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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The SMEM header structure includes the version information. Read the
version directly from the header instead of getting an item from the
global heap.
Signed-off-by: Chris Lew <clew@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Endianness can vary in the system, add le32_to_cpu when comparing
partition sizes from smem.
Signed-off-by: Chris Lew <clew@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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On msm8996 cached SMEM items are used for storing the GLINK FIFOs, so
for items not found in the uncached list we need to also search the
cased list for these items.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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In preparation for adding accessors for "cached" entries rename the
"uncached" accessors. Also rename "first" cached entry to "last", as
the cached list grows backwards.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Use the %pS printk format for printing symbols from direct addresses.
This is important for the ia64, ppc64 and parisc64 architectures, while on
other architectures there is no difference between %pS and %pF.
Fix it for consistency across the kernel.
Signed-off-by: Helge Deller <deller@gmx.de>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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Arnd Bergmann
Bjorn Andersson
Timo Alho
Thierry Reding
Mikko Perttunen
Philipp Zabel
Ladislav Michl
Neil Armstrong
Florian Fainelli
Chris Lew
Helge Deller