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2023-03-20dt-bindings: arm: mediatek: sgmiisys: Convert to DT schemaDaniel Golle2-27/+49
Convert mediatek,sgmiiisys bindings to DT schema format. Add maintainer Matthias Brugger, no maintainers were listed in the original documentation. As this node is also referenced by the Ethernet controller and used as SGMII PCS add this fact to the description. Move the file to Documentation/devicetree/bindings/net/pcs/ which seems more appropriate given that the great majority of registers are related to SGMII PCS functionality and only one register represents clock bits. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-03-20dt-bindings: net: mediatek,net: add mt7981-eth bindingDaniel Golle1-5/+48
Introduce DT bindings for the MT7981 SoC to mediatek,net.yaml. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-03-20net: ethernet: mtk_eth_soc: add support for MT7981 SoCDaniel Golle4-3/+73
The MediaTek MT7981 SoC comes with two 1G/2.5G SGMII ports, just like MT7986. In addition MT7981 is equipped with a built-in 1000Base-T PHY which can be used with GMAC1. As many MT7981 boards make use of inverting SGMII signal polarity, add new device-tree attribute 'mediatek,pn_swap' to support them. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-03-20MAINTAINERS: remove file entry in NFC SUBSYSTEM after platform_data movementLukas Bulwahn1-1/+0
Commit 053fdaa841bd ("nfc: mrvl: Move platform_data struct into driver") moves the nfcmrvl.h header file from include/linux/platform_data to the driver's directory, but misses to adjust MAINTAINERS. Hence, ./scripts/get_maintainer.pl --self-test=patterns complains about a broken reference. Just remove the file entry in NFC SUBSYSTEM, as the new location of the code is already covered by another pattern in that section. Fixes: 053fdaa841bd ("nfc: mrvl: Move platform_data struct into driver") Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-20r8169: consolidate disabling ASPM before EPHY accessHeiner Kallweit1-39/+3
Now that rtl_hw_aspm_clkreq_enable() is a no-op for chip versions < 32, we can consolidate disabling ASPM before EPHY access in rtl_hw_start(). Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-20Merge branch 'reuse-smsc-phy-functionality'David S. Miller4-76/+28
Heiner Kallweit says: ==================== net: phy: reuse SMSC PHY driver functionality in the meson-gxl PHY driver The Amlogic Meson internal PHY's have the same register layout as certain SMSC PHY's (also for non-c22-standard registers). This seems to be more than just coincidence. Apparently they also need the same workaround for EDPD mode (energy detect power down). Therefore let's reuse SMSC PHY driver functionality in the meson-gxl PHY driver. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-20net: phy: meson-gxl: reuse functionality of the SMSC PHY driverHeiner Kallweit2-69/+9
The Amlogic Meson internal PHY's have the same register layout as certain SMSC PHY's (also for non-c22-standard registers). This seems to be more than just coincidence. Apparently they also need the same workaround for EDPD mode (energy detect power down). Therefore let's reuse SMSC PHY driver functionality in the meson-gxl PHY driver. Tested with a G12A internal PHY. I don't have GXL test hw, therefore I replace only the callbacks that are identical in the SMSC PHY driver. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-20net: phy: smsc: export functions for use by meson-gxl PHY driverHeiner Kallweit2-7/+19
The Amlogic Meson internal PHY's have the same register layout as certain SMSC PHY's (also for non-c22-standard registers). This seems to be more than just coincidence. Apparently they also need the same workaround for EDPD mode (energy detect power down). Therefore let's export SMSC PHY driver functionality for use by the meson-gxl PHY driver. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Chris Healy <healych@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-20Merge branch 'ocelot-external-ports'David S. Miller9-81/+169
Colin Foster says: ==================== add support for ocelot external ports This is the start of part 3 of what is hopefully a 3-part series to add Ethernet switching support to Ocelot chips. Part 1 of the series (A New Chip) added general support for Ocelot chips that were controlled externally via SPI. https://lore.kernel.org/all/20220815005553.1450359-1-colin.foster@in-advantage.com/ Part 2 of the series (The Ethernet Strikes Back) added DSA Ethernet support for ports 0-3, which are the four copper ports that are internal to the chip. https://lore.kernel.org/all/20230127193559.1001051-1-colin.foster@in-advantage.com/ Part 3 will, at a minimum, add support for ports 4-7, which are configured to use QSGMII to an external phy (Return Of The QSGMII). With any luck, and some guidance, support for SGMII, SFPs, etc. will also be part of this series. V1 was submitted as an RFC - and that was rightly so. I suspected I wasn't doing something right, and that was certainly the case. V2 is much cleaner, so hopefully upgrading it to PATCH status is welcomed. Thanks to Russell and Vladimir for correcting my course from V1. In V1 I included a device tree snippet. I won't repeat that here, but I will include a boot log snippet, in case it is of use: ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-20net: dsa: ocelot: add support for external physColin Foster1-7/+9
The VSC7512 has four ports with internal phys that are already supported. There are additional ports that can be configured to work with external phys. Add support for these additional ethernet ports. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-20net: dsa: felix: allow serdes configuration for dsa portsColin Foster2-0/+8
Ports for Ocelot devices (VSC7511, VSC7512, VSC7513 and VSC7514) support external phys. When external phys are used, additional configuration on each port is required to enable QSGMII mode and set external phy modes. Add a configurable hook into these routines, so the external ports can be used. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-20net: dsa: felix: allow configurable phylink_mac_configColin Foster2-0/+15
If a user of the Felix driver has a port running in SGMII / QSGMII mode, it will need to utilize phylink_mac_config(). Add this configurability. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-20net: dsa: felix: attempt to initialize internal hsio pllsColin Foster1-0/+3
The VSC7512 and VSC7514 have internal PLLs that can be used to control different peripherals. Initialize these high speed I/O (HSIO) PLLs when they exist, so that dependent peripherals like QSGMII can function. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-20net: mscc: ocelot: expose serdes configuration functionColin Foster3-26/+47
During chip initialization, ports that use SGMII / QSGMII to interface to external phys need to be configured on the VSC7513 and VSC7514. Expose this configuration routine, so it can be used by DSA drivers. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-20net: mscc: ocelot: expose generic phylink_mac_config routineColin Foster3-18/+32
The ocelot-switch driver can utilize the phylink_mac_config routine. Move this to the ocelot library location and export the symbol to make this possible. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-20net: mscc: ocelot: expose ocelot_pll5_init routineColin Foster3-30/+33
Ocelot chips have an internal PLL that must be used when communicating through external phys. Expose the init routine, so it can be used by other drivers. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-20mfd: ocelot: add ocelot-serdes capabilityColin Foster1-0/+13
Add support for the Ocelot SERDES module to support functionality of all non-internal phy ports. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-20phy: phy-ocelot-serdes: add ability to be used in a non-syscon configurationColin Foster1-0/+9
The phy-ocelot-serdes module has exclusively been used in a syscon setup, from an internal CPU. The addition of external control of ocelot switches via an existing MFD implementation means that syscon is no longer the only interface that phy-ocelot-serdes will see. In the MFD configuration, an IORESOURCE_REG resource will exist for the device. Utilize this resource to be able to function in both syscon and non-syscon configurations. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-19Merge branch 'lan966x-tx-rx-improve'David S. Miller5-39/+65
Horatiu Vultur says: ==================== net: lan966x: Improve TX/RX of frames from/to CPU The first patch of this series improves the RX side. As it seems to be an expensive operation to read the RX timestamp for every frame, then read it only if it is required. This will give an improvement of ~70mbit on the RX side. The second patch stops using the packing library. This improves mostly the TX side as this library is used to set diffent bits in the IFH. If this library is replaced with a more simple/shorter implementation, this gives an improvement of more than 100mbit on TX side. All the measurements were done using iperf3. v1->v2: - update lan966x_ifh_set to set the bytes and not each bit individually ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-19net: lan966x: Stop using packing libraryHoratiu Vultur2-25/+50
When a frame is injected from CPU, it is required to create an IFH(Inter frame header) which sits in front of the frame that is transmitted. This IFH, contains different fields like destination port, to bypass the analyzer, priotity, etc. Lan966x it is using packing library to set and get the fields of this IFH. But this seems to be an expensive operations. If this is changed with a simpler implementation, the RX will be improved with ~5Mbit while on the TX is a much bigger improvement as it is required to set more fields. Below are the numbers for TX. Before: [ 5] 0.00-10.02 sec 439 MBytes 367 Mbits/sec 0 sender After: [ 5] 0.00-10.00 sec 578 MBytes 485 Mbits/sec 0 sender Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-19net: lan966x: Don't read RX timestamp if not neededHoratiu Vultur4-14/+15
Whenever a frame was received to the CPU, the HW is timestamping the frame. In the IFH(Inter Frame Header) it is found the nanosecond part of the timestamps the SW is required to read from HW the second part. But reading the second part it seems to be a expensive operations, so so change this such to read the second part only when rx filter is enabled. Doing this change gives the RX a performance boost of ~70mbit. before: [ 5] 0.00-10.01 sec 546 MBytes 457 Mbits/sec 0 sender now: [ 5] 0.00-10.01 sec 652 MBytes 530 Mbits/sec 0 sender Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-19net/packet: remove po->xmitEric Dumazet2-16/+10
Use PACKET_SOCK_QDISC_BYPASS atomic bit instead of a pointer. This removes one indirect call in fast path, and READ_ONCE()/WRITE_ONCE() annotations as well. Signed-off-by: Eric Dumazet <edumazet@google.com> Suggested-by: Willem de Bruijn <willemb@google.com> Cc: Daniel Borkmann <daniel@iogearbox.net> Reviewed-by: Willem de Bruijn <willemb@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-19net: macb: Reset TX when TX halt times outHarini Katakam1-2/+8
Reset TX when halt times out i.e. disable TX, clean up TX BDs, interrupts (already done) and enable TX. This addresses the issue observed when iperf is run at 10Mps Half duplex where, after multiple collisions and retries, TX halts. Signed-off-by: Harini Katakam <harini.katakam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Reviewed-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-19ixgb: Remove ixgb driverTony Nguyen26-6772/+0
There are likely no users of this driver as the hardware has been discontinued since 2010. Remove the driver and all references to it in documentation. Suggested-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Acked-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-19net: phy: at803x: Replace of_gpio.h with what indeed is usedAndy Shevchenko1-2/+1
of_gpio.h in this driver is solely used as a proxy to other headers. This is incorrect usage of the of_gpio.h. Replace it .h with what indeed is used in the code. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-19net: smc91x: Replace of_gpio.h with what indeed is usedAndy Shevchenko1-1/+1
of_gpio.h in this driver is solely used as a proxy to other headers. This is incorrect usage of the of_gpio.h. Replace it .h with what indeed is used in the code. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-19net: macb: Set MDIO clock divisor for pclk higher than 160MHzBartosz Wawrzyniak2-1/+7
Currently macb sets clock divisor for pclk up to 160 MHz. Function gem_mdc_clk_div was updated to enable divisor for higher values of pclk. Signed-off-by: Bartosz Wawrzyniak <bwawrzyn@cisco.com> Reviewed-by: Michal Kubiak <michal.kubiak@intel.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-18Merge branch 'net-better-const'David S. Miller19-57/+36
Eric Dumazet says: ==================== net: better const qualifier awareness This is a follow-up of d27d367d3b78 ("inet: better const qualifier awareness") Adopting container_of_const() to perform (struct sock *)->(protocol sock *) operation is allowing us to propagate const qualifier and thus detect misuses at compile time. Most conversions are trivial, because most protocols did not adopt yet const sk pointers where it could make sense. Only mptcp and tcp patches (end of this series) are requiring small adjustments. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-18tcp: preserve const qualifier in tcp_sk()Eric Dumazet7-13/+21
We can change tcp_sk() to propagate its argument const qualifier, thanks to container_of_const(). We have two places where a const sock pointer has to be upgraded to a write one. We have been using const qualifier for lockless listeners to clearly identify points where writes could happen. Add tcp_sk_rw() helper to better document these. tcp_inbound_md5_hash(), __tcp_grow_window(), tcp_reset_check() and tcp_rack_reo_wnd() get an additional const qualififer for their @tp local variables. smc_check_reset_syn_req() also needs a similar change. Signed-off-by: Eric Dumazet <edumazet@google.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-18mptcp: preserve const qualifier in mptcp_sk()Eric Dumazet2-7/+4
We can change mptcp_sk() to propagate its argument const qualifier, thanks to container_of_const(). We need to change few things to avoid build errors: mptcp_set_datafin_timeout() and mptcp_rtx_head() have to accept non-const sk pointers. @msk local variable in mptcp_pending_tail() must be const. Signed-off-by: Eric Dumazet <edumazet@google.com> Cc: Matthieu Baerts <matthieu.baerts@tessares.net> Reviewed-by: Simon Horman <simon.horman@corigine.com> Reviewed-by: Matthieu Baerts <matthieu.baerts@tessares.net> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-18x25: preserve const qualifier in [a]x25_sk()Eric Dumazet2-8/+2
We can change [a]x25_sk() to propagate their argument const qualifier, thanks to container_of_const(). Signed-off-by: Eric Dumazet <edumazet@google.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-18smc: preserve const qualifier in smc_sk()Eric Dumazet1-4/+1
We can change smc_sk() to propagate its argument const qualifier, thanks to container_of_const(). Signed-off-by: Eric Dumazet <edumazet@google.com> Cc: Karsten Graul <kgraul@linux.ibm.com> Cc: Wenjia Zhang <wenjia@linux.ibm.com> Cc: Jan Karcher <jaka@linux.ibm.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Reviewed-by: Wenjia Zhang <wenjia@linux.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-18af_unix: preserve const qualifier in unix_sk()Eric Dumazet2-5/+2
We can change unix_sk() to propagate its argument const qualifier, thanks to container_of_const(). We need to change dump_common_audit_data() 'struct unix_sock *u' local var to get a const attribute. Signed-off-by: Eric Dumazet <edumazet@google.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-18dccp: preserve const qualifier in dccp_sk()Eric Dumazet1-4/+2
We can change dccp_sk() to propagate its argument const qualifier, thanks to container_of_const(). Signed-off-by: Eric Dumazet <edumazet@google.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-18ipv6: raw: preserve const qualifier in raw6_sk()Eric Dumazet1-4/+1
We can change raw6_sk() to propagate its argument const qualifier, thanks to container_of_const(). Signed-off-by: Eric Dumazet <edumazet@google.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-18raw: preserve const qualifier in raw_sk()Eric Dumazet1-4/+1
We can change raw_sk() to propagate const qualifier of its argument, thanks to container_of_const() Signed-off-by: Eric Dumazet <edumazet@google.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-18af_packet: preserve const qualifier in pkt_sk()Eric Dumazet1-4/+1
We can change pkt_sk() to propagate const qualifier of its argument, thanks to container_of_const() This should avoid some potential errors caused by accidental (const -> not_const) promotion. Signed-off-by: Eric Dumazet <edumazet@google.com> Cc: Willem de Bruijn <willemb@google.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-18udp: preserve const qualifier in udp_sk()Eric Dumazet1-4/+1
We can change udp_sk() to propagate const qualifier of its argument, thanks to container_of_const() This should avoid some potential errors caused by accidental (const -> not_const) promotion. Signed-off-by: Eric Dumazet <edumazet@google.com> Cc: Willem de Bruijn <willemb@google.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-17Merge branch 'net-mlx5e-add-gbp-vxlan-hw-offload-support'Jakub Kicinski9-56/+151
Gavin Li says: ==================== net/mlx5e: Add GBP VxLAN HW offload support Patch-1: Remove unused argument from functions. Patch-2: Expose helper function vxlan_build_gbp_hdr. Patch-3: Add helper function for encap_info_equal for tunnels with options. Patch-4: Preserving the const-ness of the pointer in ip_tunnel_info_opts. Patch-5: Add HW offloading support for TC flows with VxLAN GBP encap/decap in mlx ethernet driver. ==================== Link: https://lore.kernel.org/r/20230316070758.83512-1-gavinl@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-03-17net/mlx5e: TC, Add support for VxLAN GBP encap/decap flows offloadGavin Li3-4/+87
Add HW offloading support for TC flows with VxLAN GBP encap/decap. Example of encap rule: tc filter add dev eth0 protocol ip ingress flower \ action tunnel_key set id 42 vxlan_opts 512 \ action mirred egress redirect dev vxlan1 Example of decap rule: tc filter add dev vxlan1 protocol ip ingress flower \ enc_key_id 42 enc_dst_port 4789 vxlan_opts 1024 \ action tunnel_key unset action mirred egress redirect dev eth0 Signed-off-by: Gavin Li <gavinl@nvidia.com> Reviewed-by: Gavi Teitz <gavi@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Maor Dickman <maord@nvidia.com> Acked-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-03-17ip_tunnel: Preserve pointer const in ip_tunnel_info_optsGavin Li1-5/+6
Change ip_tunnel_info_opts( ) from static function to macro to cast return value and preserve the const-ness of the pointer. Signed-off-by: Gavin Li <gavinl@nvidia.com> Reviewed-by: Eric Dumazet <edumazet@google.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-03-17net/mlx5e: Add helper for encap_info_equal for tunnels with optionsGavin Li3-23/+36
For tunnels with options, eg, geneve and vxlan with gbp, they share the same way to compare the headers and options. Extract the code as a common function for them. Signed-off-by: Gavin Li <gavinl@nvidia.com> Reviewed-by: Gavi Teitz <gavi@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Maor Dickman <maord@nvidia.com> Acked-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-03-17vxlan: Expose helper vxlan_build_gbp_hdrGavin Li2-19/+19
The function vxlan_build_gbp_hdr will be used by other modules to build gbp option in vxlan header according to gbp flags. Signed-off-by: Gavin Li <gavinl@nvidia.com> Reviewed-by: Gavi Teitz <gavi@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Reviewed-by: Maor Dickman <maord@nvidia.com> Acked-by: Saeed Mahameed <saeedm@nvidia.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-03-17vxlan: Remove unused argument from vxlan_build_gbp_hdr( ) and vxlan_build_gpe_hdr( )Gavin Li1-6/+4
Remove unused argument (i.e. u32 vxflags) in vxlan_build_gbp_hdr( ) and vxlan_build_gpe_hdr( ) function arguments. Signed-off-by: Gavin Li <gavinl@nvidia.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-03-17wwan: core: Support slicing in port TX flow of WWAN subsystemhaozhe chang8-36/+81
wwan_port_fops_write inputs the SKB parameter to the TX callback of the WWAN device driver. However, the WWAN device (e.g., t7xx) may have an MTU less than the size of SKB, causing the TX buffer to be sliced and copied once more in the WWAN device driver. This patch implements the slicing in the WWAN subsystem and gives the WWAN devices driver the option to slice(by frag_len) or not. By doing so, the additional memory copy is reduced. Meanwhile, this patch gives WWAN devices driver the option to reserve headroom in fragments for the device-specific metadata. Signed-off-by: haozhe chang <haozhe.chang@mediatek.com> Reviewed-by: Loic Poulain <loic.poulain@linaro.org> Link: https://lore.kernel.org/r/20230316095826.181904-1-haozhe.chang@mediatek.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-03-17net: macb: Increase halt timeout to accommodate 10Mbps linkHarini Katakam1-2/+1
Increase halt timeout to accommodate for 16K SRAM at 10Mbps rounded. Signed-off-by: Harini Katakam <harini.katakam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20230316083050.2108-1-harini.katakam@amd.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-03-17dt-bindings: net: qcom,ipa: add SDX65 compatibleAlex Elder1-0/+1
Add support for SDX65, which uses IPA v5.0. Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20230315194305.1647311-1-elder@linaro.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-03-17Merge branch 'net-dsa-mv88e6xxx-accelerate-c45-scan'Jakub Kicinski2-205/+196
Klaus Kudielka says: ==================== net: dsa: mv88e6xxx: accelerate C45 scan Starting with commit 1a136ca2e089 ("net: mdio: scan bus based on bus capabilities for C22 and C45"), mdiobus_scan_bus_c45() is being called on buses with MDIOBUS_NO_CAP. On a Turris Omnia (Armada 385, 88E6176 switch), this causes a significant increase of boot time, from 1.6 seconds, to 6.3 seconds. The boot time stated here is until start of /init. Further testing revealed that the C45 scan is indeed expensive (around 2.7 seconds, due to a huge number of bus transactions), and called twice. Two things were suggested: (1) to move the expensive call of mv88e6xxx_mdios_register() from mv88e6xxx_probe() to mv88e6xxx_setup(). (2) to mask apparently non-existing phys during probing. Before that: Patch #1 prepares the driver to handle the movement of mv88e6xxx_mdios_register() to mv88e6xxx_setup() for cross-chip DSA trees. Patch #2 is preparatory code movement, without functional change. With those changes, boot time on the Turris Omnia is back to normal. Link: https://lore.kernel.org/lkml/449bde236c08d5ab5e54abd73b645d8b29955894.camel@gmail.com/ ==================== Link: https://lore.kernel.org/r/20230315163846.3114-1-klaus.kudielka@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-03-17net: dsa: mv88e6xxx: mask apparently non-existing phys during probingKlaus Kudielka1-0/+1
To avoid excessive mdio bus transactions during probing, mask all phy addresses that do not exist (there is a 1:1 mapping between switch port number and phy address). Suggested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Klaus Kudielka <klaus.kudielka@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2023-03-17net: dsa: mv88e6xxx: move call to mv88e6xxx_mdios_register()Klaus Kudielka1-12/+14
Call the rather expensive mv88e6xxx_mdios_register() at the beginning of mv88e6xxx_setup(). This avoids the double call via mv88e6xxx_probe() during boot. For symmetry, call mv88e6xxx_mdios_unregister() at the end of mv88e6xxx_teardown(). Link: https://lore.kernel.org/lkml/449bde236c08d5ab5e54abd73b645d8b29955894.camel@gmail.com/ Suggested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Klaus Kudielka <klaus.kudielka@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Tested-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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