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2026-07-15drm/amdgpu/mes: add MES process/gang context size and bitmap helperPrike Liang2-1/+77
Allocating the MES context bitmap to track the process/gang index usage. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Michael Chen <michael.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amdgpu: fix bo->pin leaking in amdgpu_bo_create_reservedZhu Lingshan1-5/+8
amdgpu_bo_create_reserved() only allocates a new BO when *bo_ptr (struct amdgpu_bo **bo_ptr as input parameter) is NULL, it simply skips creation when *bo_ptr is non-NULL. But it unconditionally reserves, pins, gart allocates and maps the BO afterwards. When the same non-NULL BO pointer is passed in again, for example firmware buffers that live in adev and are re-loaded on every resume / cp_resume / start under AMDGPU_FW_LOAD_DIRECT, amdgpu_bo_pin() just increases pin_count unconditionally, however the matching teardown only unpins once, so pin_count never drops to zero, so TTM is not able to move, swap or evict a BO, causing BO leaks. This commit fixes this issue by only pinning the bo once at creation, and repeated calls no longer take additional pin references. Signed-off-by: Zhu Lingshan <lingshan.zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Use unbound workqueues for deferred DM workGeoffrey McRae2-3/+32
DM currently queues some deferred display work on system workqueues. Low-context IRQ handlers are queued on system_highpri_wq, while deferred vmin/vmax updates are queued on system_percpu_wq. Both paths can execute long-running display work. HPD and HPD RX handling may involve link detection, AUX transactions, connector state updates, and hotplug notification. The vmin/vmax update path calls into DC under dc_lock to adjust stream timing. These paths can therefore trigger the workqueue CPU hog detector when run from per-CPU workers: workqueue: dm_irq_work_func [amdgpu] hogged CPU for >10000us workqueue: dm_handle_vmin_vmax_update [amdgpu] hogged CPU for >10000us Move the deferred low-context IRQ work to a dedicated high-priority unbound workqueue, preserving the priority of the previous system_highpri_wq usage while avoiding long-running work on per-CPU workers. Move deferred vmin/vmax updates to a separate normal-priority unbound workqueue. High-context IRQ handlers remain unchanged and continue to run directly from the IRQ path. Signed-off-by: Geoffrey McRae <geoffrey.mcrae@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amdgpu/userq: fix indefinite fence wait during GPU resetJesse Zhang1-11/+14
pre_reset only force-completes fences of MAPPED queues. A queue in any other state (e.g. mid-eviction) keeps its last_fence pending; after a GPU reset that fence never signals, so the eviction/suspend worker and process teardown (amdgpu_evf_mgr_flush_suspend) wait on it forever and wedge the machine: INFO: task kworker/6:28 blocked for more than 120 seconds. Workqueue: events amdgpu_eviction_fence_suspend_worker [amdgpu] Call Trace: dma_fence_wait_timeout+0x7e/0x130 amdgpu_userq_evict+0x67/0x140 [amdgpu] amdgpu_eviction_fence_suspend_worker+0xd8/0x160 [amdgpu] process_scheduled_works+0xa6/0x420 Force-complete every queue's fence regardless of state. The unmap and mark-hung step stays gated on MAPPED, since unmapping a queue that is not mapped is invalid. Fixes: 290f46cf5726 ("drm/amdgpu: Implement user queue reset functionality") Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Fix DM IRQ teardown racesGeoffrey McRae2-77/+68
DM IRQ teardown can race with interrupt handling and low-context work. The IRQ handler can still walk the DM IRQ handler tables while the teardown path removes and frees entries. Low-context work can also remain queued after its handler has been removed, leading to a possible use-after-free when the work item later runs. Rework amdgpu_dm_irq_fini() to detach all low and high context handlers from the IRQ tables under the table lock, then cancel pending low-context work outside the lock before freeing the handlers. Also cancel low-context work in remove_irq_handler() before freeing an individual handler. Fix the suspend path by disabling HPD and HPD RX hardware interrupts under the IRQ table lock before flushing pending low-context work, avoiding a TOCTOU window where new work could be queued after the list check. Finally, call amdgpu_dm_irq_fini() from amdgpu_dm_fini() before DC is destroyed, so IRQ teardown happens while the display core state is still valid. Signed-off-by: Geoffrey McRae <geoffrey.mcrae@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amdgpu: add RS64 local memory context array init/finiPrike Liang2-0/+51
Add amdgpu_mes_rs64mem_init() and amdgpu_mes_rs64mem_fini() to manage the RS64 local memory context arrays used by the MES scheduler. Signed-off-by: Prike Liang <Prike.Liang@amd.com> Reviewed-by: Michael Chen <michael.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display/amdgpu_dm: show error namesMichał Mirosław3-34/+38
Convert printk() args that log error numbers to log the names. Acked-by: George Zhang <george.zhang@amd.com> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Promote DC to 3.2.389Taimur Hassan1-1/+1
This DC patchset brings improvements in multiple areas. In summary, we have: * Fixes on EDID 8K parsing, cursor mode, backlight, OLED/VABC, and HDR to SDR * Improvements on DCN42 clocking, det allocation, and power gating * Greatly enhanced KUnit coverage across amdgpu_dm * Code cleanup Acked-by: George Zhang <george.zhang@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: don't re-evaluate cursor mode on cursor plane movementJames Lin1-8/+19
[Why] The cursor-mode re-evaluation added to dm_crtc_get_cursor_mode() also checks the cursor plane's own destination rectangle. The crtc_x/y/w/h check lives in the per-plane loop, which only flags the cursor plane via cursor_changed and does not skip it, so the check fires whenever the cursor itself moves. flip-vs-cursor-legacy (kms_cursor_legacy) issues a stream of legacy cursor moves and requires each to land on the fast path within a single vblank. With the position check, every cursor move now sets consider_mode_change and defeats the early return, forcing the full cursor-mode evaluation. A legacy cursor move is a cursor-only commit: the underlying planes are not in the atomic state, so the coverage loop (for_each_oldnew_plane_in_descending_zpos walks only planes in the state) sees nothing covering the CRTC, evaluates entire_crtc_covered as false, and misclassifies the cursor mode as OVERLAY on a fully-covered screen. That spurious NATIVE->OVERLAY transition makes should_reset_plane() return true (lock_and_validation_needed), pulls all CRTC planes into the commit, and - because amdgpu_dm_plane_atomic_async_check() rejects async updates in overlay mode - permanently knocks later cursor updates off the async fast path. Each cursor move becomes a full atomic commit with DC global validation, serialized against the page flip, so cursor updates no longer fit in one vblank and flip-vs-cursor-legacy fails / times out [How] The cursor mode is a function of the underlying planes' coverage and properties, not of the cursor's position, so cursor movement can never change the correct mode. Restrict the destination-rectangle check to non-cursor planes. A move/resize of an underlying plane (the case the original change targets, e.g. amd_cursor_overlay@non-full) still re-evaluates the mode correctly, while pure cursor movement returns to the fast path. Reviewed-by: ChiaHsuan (Tom) Chung <chiahsuan.chung@amd.com> Signed-off-by: James Lin <PingLei.Lin@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: add DST_Y_DELTA_DRQ_LIMIT hw programmingCharlene Liu2-1/+53
[why] dchubp needs to program DST_Y_DELTA_DRQ_LIMIT based on dml2.x Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: add DST_Y_DELTA_DRQ_LIMIT reg macro for later useCharlene Liu3-1/+5
[why] DST_Y_DELTA_DRQ_LIMIT from dml2.1 Reviewed-by: Leo Chen <leo.chen@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: fix dcn42b det allocation orderDmytro Laktyushkin1-0/+1
set_pipe_unlock_order needs to be set to true for the pipes to be unlocked in correct order to avoid det overallocation Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Enable HUBP/DPP Driver PG for DCN42Leo Chen1-2/+2
[Why & How] The related corruption issue is now resolved, HUBP/DPP driver PG can be enabled for DCN42. Reviewed-by: Ovidiu (Ovi) Bunea <ovidiu.bunea@amd.com> Signed-off-by: Leo Chen <leo.chen@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: fix dcn42 det allocation orderDmytro Laktyushkin1-0/+1
set_pipe_unlock_order needs to be set to true for the pipes to be unlocked in correct order to avoid det overallocation Reviewed-by: Taimur Hassan <syed.hassan@amd.com> Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Fix DMSS not triggering for HDR to SDR transitionKarthi Kandasamy6-17/+60
Why: DMSS feature was not getting triggered during HDR to SDR transitions, and no DPCD write was observed. Root cause analysis revealed that incorrect panel capabilities were being reported for PSR SU panels. Due to the wrong capabilities, the OS was not invoking the DMSS API, resulting in no DPCD communication and also gate eDP teardown across DMSS hold How: Fixed by setting the correct power panel capabilities for PSR SU panels. This ensures the OS receives accurate panel capability information and triggers the DMSS API as expected, restoring proper DPCD writes during HDR to SDR transitions. The DC commit sequence,was tearing the eDP down anyway -- backlight off, ABM disable, DPMS off, PSR/Replay feature_enabled cleared, PHY TX off, OTG/OPTC off all these actions are blocked now with the skip_implict_edp_power_control Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Karthi Kandasamy <karthi.kandasamy@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Add stream property tests for connectorBhawanpreet Lakha3-1/+282
Add KUnit coverage for fill_stream_properties_from_drm_display_mode(): zeroed borders, RGB defaults, sync polarity handling, inheriting from an old stream, timing from the crtc, requested bpc colour depth, content type and aspect ratio. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Add CACP caps tests for connectorBhawanpreet Lakha2-0/+150
Add KUnit coverage for amdgpu_dm_update_cacp_caps(): eDP and LVDS supported, old/3.1.6 IP versions unsupported, non-eDP/LVDS and LCD panels unsupported. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Add crtc matching and panel type tests for connectorBhawanpreet Lakha3-0/+315
Add KUnit coverage for amdgpu_dm_find_first_crtc_matching_connector(): match, no match, empty state, skipping NULL connector slots, and returning the first match when several target the same crtc. Also add coverage for amdgpu_dm_set_panel_type(): VSDB OLED/miniLED, DPCD OLED/miniLED, Samsung miniLED above and below threshold, and the default LCD fallback. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Add MST link detection tests for connectorBhawanpreet Lakha2-0/+130
Add KUnit coverage for amdgpu_dm_detect_mst_link_for_all_connectors() to the amdgpu_dm_connector tests: - No connectors registered: iteration body never runs and the call succeeds. - Writeback connector: hit by the early continue - Non-MST link - MST branch without aux: NULL mst_mgr.aux Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Exit LS for ISHARP before coefficient writeNicholas Kazlauskas1-14/+11
[Why] The hardware programming guide indicates that we must exit LS before any coefficient writes. This is true across all ASIC for this block. [How] Drop the ips_v2 checks and unconditionall perform the update. It is not based on IPS V2 support, which is set for DCN42, but rather the presence of the block itself. Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: enable hdmistreamclk_rcg by default for dcn42Charlene Liu3-7/+10
[why] enable hdmistreamclk_rcg by default Reviewed-by: Leo Chen <leo.chen@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test backlight ABM property attachAlex Hung1-0/+63
[WHAT] Cover the eDP success path of amdgpu_dm_setup_backlight_device() where the ABM level property is attached to the connector. A DRM-managed connector fixture (drmm_mode_config_init + drmm_connector_init) lets the test verify that one property is added and that its value is ABM_SYSFS_CONTROL. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test panel power savings sysfsAlex Hung3-6/+195
[WHAT] Add KUnit coverage using a DRM-managed connector fixture. Tests cover show() mapping immediate-disable to 0 and reporting an active ABM level, and store() handling the disable mapping, the forbidden update, invalid text, and out-of-range input. show() writes through a page-backed buffer because sysfs_emit() requires one. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test backlight device registrationAlex Hung2-0/+21
[WHAT] Add KUnit test to amdgpu_dm_register_backlight_device() and cover its bl_idx == -1 early return, which must leave the backlight device slot untouched. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test backlight level readback pathAlex Hung3-3/+164
[WHAT] Add KUnit coverage for the backlight level read path. A faked link_service vtable returns canned PWM and AUX brightness values, letting the tests verify both the successful readback and the DC_ERROR/AUX-failure fallbacks to the cached brightness, plus the get_brightness() device-index wrapper. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test backlight level programming pathAlex Hung3-2/+272
[WHAT] Add KUnit coverage for the backlight level write path in amdgpu_dm_backlight.c. Tests cover stream lookup hit/miss, the connector-off and no-stream early returns, and the AUX/PWM/idle-reallow programming branches. The DC programming calls stay safe by injecting a NULL power module and keeping idle optimizations a no-op via disable_idle_power_optimizations. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test MST coverage gapsAlex Hung3-20/+356
[WHAT] Add KUnit tests for uncovered MST paths: - dm_mst_get_pbn_divider with non-null link - retrieve_downstream_port_device AUX read failure - dm_dp_aux_transfer non-ACK reply handling - dm_handle_mst_sideband_msg_ready_event ESI read failure and ready-bit without MST state - dm_handle_mst_down_rep_msg_ready wrapper - amdgpu_dm_initialize_dp_connector eDP early return - amdgpu_dm_initialize_dp_connector non-eDP MST init path (dc_link_dp_get_max_link_enc_cap, drm_dp_mst_topology_mgr_init and subconnector property attach) The non-eDP MST test uses standard DRM KUnit helpers to build a full fixture (drmm_mode_config_init plus drm_connector_init), which the topology manager and subconnector property require, and stubs the DC link service get_max_link_enc_cap callback. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Add KUnit test for wb jobsAlex Hung3-2/+52
[WHAT] Add KUnit tests to verify both functions return early when job->fb is NULL without touching any buffer object. Assisted-by: Copilot:Claude-Opus-4.6 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Fix backlight max_brightness to match exported rangeMario Limonciello2-7/+7
[Why] FWTS autobrightness fails on eDP panels because actual_brightness can read higher than the advertised max_brightness (e.g. 63576 vs 62451). The conversion helpers expose the firmware PWM range to userspace as [0..max]. But max_brightness is advertised as (max - min), which is smaller. So reading the level can return a value above max_brightness. This regressed in commit 4b61b8a39051 ("drm/amd/display: Add debugging message for brightness caps"), which changed max_brightness to (max - min) and undid commit 8dbd72cb7900 ("drm/amd/display: Export full brightness range to userspace"). [How] Advertise max_brightness as max, and scale the initial AC/DC brightness against max too. Update the KUnit expectations to match. Fixes: 4b61b8a39051 ("drm/amd/display: Add debugging message for brightness caps") Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: limit reuse dsc capable bootup timingCharlene Liu1-0/+7
[why] Previous dcn315 BIOS has known dsc issue, not good for reuse their dsc settings. this pre-OS dsc issue is fixed in dcn42 bios. since there is no production bios update for older asic, limit our new code instead. Reviewed-by: Mohit Bawa <mohit.bawa@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Skip Update HDCP Config In Transition StateFangzhi Zuo1-8/+20
Transition state does not have a valid dm_stream_ctx that should skip configuring HDCP routine. The routine is valid to go through only when a valid stream is created. Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: remove unused dcn42 socbb valuesDmytro Laktyushkin1-6/+0
These values should be unset for dcn42 Reviewed-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Allocate DCN32/1 dmub memory to GTTFangzhi Zuo1-2/+9
[Why] On DCN32/321 sometimes DMCUB takes a long time to flush. This adds a delay before the data is available on the driver side even after driver receives notification from DMCUB via inbox [How] Allocating DMUB memory to GTT gives much better latency. Limit this to DCN32/1 for now; it will be made general to all other dGPUs later. Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Sun peng (Leo) Li <sunpeng.li@amd.com> Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Fix VABC Init and OLED SupportIswara Nagulendran4-10/+56
[Why] TCONs supporting VESA AUX Backlight does not always support VESA Smooth Brightness. Driver software needs to implement smooth brightness by periodically updating the brightness by small steps. Driver implementation is completed and verified on LCD panels but solution is missing for OLED panels. [How] Updated driver to include smooth brightness for OLED panels using VESA Aux Backlight. Revert original workaround for VABC on oled issue, as it is no longer needed. Add VABC backlight Initialization sequence from driver side. Add fix to remove conflict between FW and driver backlight programming for future ASIC. Enable VABC for all future asic revisions. Reviewed-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Iswara Nagulendran <Iswara.Nagulendran@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test plane atomic check and hooksAlex Hung3-9/+482
[WHAT] Add KUnit tests for amdgpu_dm_plane_atomic_async_check(), amdgpu_dm_plane_atomic_check(), amdgpu_dm_plane_panic_flush() and the DRM plane reset, duplicate-state and destroy-state hooks. Add the dm_test_init_atomic_check_state() helper and plane reset vtable used by the new tests. Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test helper_check_state rejectsAlex Hung1-0/+188
[WHAT] Add KUnit tests for amdgpu_dm_plane_helper_check_state() covering the small viewport width, small viewport height, bottom-edge clipping and scaling-caps rejection paths. Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test DCC and cursor edge casesAlex Hung1-0/+113
[WHAT] Add KUnit tests for the capability-callback-failure and not-capable paths of amdgpu_dm_plane_validate_dcc(), and for the bad-size path of amdgpu_dm_plane_get_cursor_position(). Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test GFX12 DCC plane attributesAlex Hung1-0/+162
[WHAT] Add KUnit tests for amdgpu_dm_plane_fill_gfx12_plane_attributes_from_modifiers() covering the block0, unconstrained-block and validation-failure cases. Add the dm_test_gfx12_attrs() helper used to build the GFX12 inputs. Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test GFX9 DCC plane attributesAlex Hung1-0/+351
[WHAT] Add KUnit tests for amdgpu_dm_plane_fill_gfx9_plane_attributes_from_modifiers() covering DCC enablement, validation failure, and the RB+ 64B/128B and GFX9 64B/unconstrained block modes. Add the dm_test_gfx9_attrs(), dm_test_setup_gfx9_dcc_device() and dm_test_gfx9_dcc_modifier() helpers used to build the GFX9 DCC inputs. Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test plane buffer attributesAlex Hung1-0/+135
[WHAT] Add KUnit tests for the video and GFX12 paths of amdgpu_dm_plane_fill_plane_buffer_attributes(). Introduce the dm_test_plane_attrs(), dm_test_video_attrs() and dm_test_graphics_attrs() helpers that drive the buffer-attribute fill with representative plane states. Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test plane scaling info pathsAlex Hung1-0/+125
[WHAT] Add KUnit tests covering the NV12 DCN1.x and plane-caps paths of amdgpu_dm_plane_fill_dc_scaling_info() and the FP16 path of amdgpu_dm_plane_get_min_max_dc_plane_scaling(). Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test GFX11/GFX12 plane modifiersAlex Hung1-0/+179
[WHAT] Add KUnit tests for amdgpu_dm_plane_get_plane_modifiers() on GFX11 (64K-first and 256K-first) and GFX12 devices. Add a register-read mock (dm_test_gfx11_reg_ctx and friends) and device-setup helpers so the GFX11 DCC modifier ordering can be checked without real hardware. Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test GFX9/GFX10 plane modifiersAlex Hung1-0/+219
[WHAT] Add KUnit tests for amdgpu_dm_plane_get_plane_modifiers() on GFX9, Raven, Raven constant-encode, GFX10.1 and GFX10.3 devices. Introduce the dm_test_expect_mods_terminated(), dm_test_mods_contain() and dm_test_get_primary_mods() helpers used to validate the generated modifier lists. Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Test format info and blendingAlex Hung1-7/+134
[WHAT] Add KUnit coverage for amdgpu_dm_plane_get_format_info(), the overlay universal-plane path of get_plane_formats(), the D-swizzle rejection path of format_mod_supported(), and the DCN4.2 variant of fill_blending_from_plane_state(). These exercise format-query and blending code paths that the existing suite did not cover. Assisted-by: Copilot:Claude-Opus-4.8 GPT-5.5 Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Add FBC init tests for connectorBhawanpreet Lakha3-1/+115
Add KUnit coverage for amdgpu_dm_fbc_init() on the amdgpu_dm_connector tests: - No FBC present - Non-eDP link - Buffer already allocated Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Add subconnector property tests for connectorBhawanpreet Lakha3-1/+145
Add KUnit coverage for update_subconnector_property() on the amdgpu_dm_connector suite: - DP connector with a sink: subconnector property is resolved from the dongle type (VGA converter -> VGA). - DP connector without a sink: dongle type is ignored and the property stays Unknown. - Non-DP connector: function early-returns and leaves a pre-seeded property value untouched. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Add color space and timing tests for connectorBhawanpreet Lakha3-1/+190
Add KUnit coverage for adjust_colour_depth_from_display_info() 420 reduction, amdgpu_dm_get_output_color_space() Y_ONLY/YCbCr601/BT2020 fallbacks, to_drm_connector_type() dual-link DVI-D, and copy_crtc_timing_for_drm_display_mode(). Export copy_crtc_timing_for_drm_display_mode via EXPORT_IF_KUNIT so the tests can reach it. Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: More Kunit tests for audioBhawanpreet Lakha3-11/+145
Split audio init to make the initialization modular Test the audio pin initialization Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Add more tests for HDCPBhawanpreet Lakha3-17/+276
Adds a few more test cases to the hdcp code - process_output(): make sure work gets requeued when callback and watchdog are stopped but also asked to run again - event_property_update(): bail out when the connector is NULL - hdcp_handle_cpirq(): schedules the work and picks the right link - hdcp_update_display(): schedules property validation on enable, resets status and cancels validation on disable - hdcp_create_workqueue(): returns NULL when max links is zero Assisted-by: Copilot:Claude-Opus-4.8 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-15drm/amd/display: Tear down dangling pipe on boot to fix s0i3Tom Chung3-0/+119
[Why] If an external monitor is connected at power-on and then unplugged before the driver loads (e.g. at the GRUB menu), the system can no longer enter the s0i3 deepest suspend state, even though all connectors report disconnected. The pre-OS firmware (GOP/vBIOS) lights up a front-end for the display that is present at power-on. The driver never fully tears this inherited pipe down, and the leftover pipe keeps the DCN block from reaching idle, which blocks s0i3. [How] Add dc_disable_dangling_timing_generators() to DC core and call it from amdgpu_dm right after dc_hardware_init(). It scans every enabled timing generator and classifies it as in-use or dangling. If a dangling pipe exists and nothing needs to be preserved, power down the hw blocks so DCN can reach idle. Assisted-by: Cursor:claude-opus-4.8 Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: George Zhang <george.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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