| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
With 'unevaluatedProperties' support implemented, the TI j721e endpoint
binding example has a warning:
Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.example.dt.yaml: pcie-ep@d000000: Unevaluated properties are not allowed ('max-link-speed', 'num-lanes', 'max-functions' were unexpected)
Adjust where pci-ep.yaml is referenced so that ti,j721e-pci-ep.yaml will
include it.
Cc: Tom Joseph <tjoseph@cadence.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211206194413.2469643-1-robh@kernel.org
|
|
This doesn't yet do anything in the tools, but make it explicit so we can
check either 'unevaluatedProperties' or 'additionalProperties' is present
in schemas.
'unevaluatedProperties' is appropriate when including another schema (via
'$ref') and all possible properties and/or child nodes are not
explicitly listed in the schema with the '$ref'.
This is in preparation to add a meta-schema to check for missing
'unevaluatedProperties' or 'additionalProperties'. This has been a
constant source of review issues.
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Wolfram Sang <wsa@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Link: https://lore.kernel.org/r/20201005183830.486085-2-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
|
|
Deprecate cdns,max-outbound-regions and cdns,no-bar-match-nbits for
host mode as both these could be derived from "ranges" and "dma-ranges"
property. "cdns,max-outbound-regions" property would still be required
for EP mode.
Link: https://lore.kernel.org/r/20200508130646.23939-2-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Tom Joseph <tjoseph@cadence.com>
|
|
Include Cadence core DT schema and define the Cadence platform DT schema
for both Host and Endpoint mode. Note: The Cadence core DT schema could
be included for other platforms using Cadence PCIe core.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
|
Rob Herring
Kishon Vijay Abraham I