| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2019-10-28 | ARCv2: mm: TLB Miss optim: SMP builds can cache pgd pointer in mmu scratch reg | 1 | -1/+1 | |
| 2019-06-19 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 | 1 | -4/+1 | |
| 2017-03-02 | sched/headers: Prepare for new header dependencies before moving code to <linux/sched/mm.h> | 1 | -0/+1 | |
| 2016-05-30 | Fix typos | 1 | -1/+1 | |
| 2013-11-06 | ARC: [SMP] TLB flush | 1 | -1/+16 | |
| 2013-11-06 | ARC: [SMP] ASID allocation | 1 | -16/+28 | |
| 2013-08-30 | ARC: [ASID] Track ASID allocation cycles/generations | 1 | -69/+28 | |
| 2013-08-30 | ARC: [ASID] activate_mm() == switch_mm() | 1 | -11/+9 | |
| 2013-08-30 | ARC: [ASID] get_new_mmu_context() to conditionally allocate new ASID | 1 | -27/+18 | |
| 2013-08-30 | ARC: [ASID] Remove legacy/unused debug code | 1 | -11/+0 | |
| 2013-02-15 | ARC: SMP support | 1 | -0/+4 | |
| 2013-02-15 | ARC: MMU Context Management | 1 | -0/+209 |
