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2022-02-24ARM: tegra: Fix ethernet node namesOleksij Rempel1-1/+1
The node name of Ethernet controller should be "ethernet" instead of "asix" or "smsc" as required by Ethernet controller devicetree schema: Documentation/devicetree/bindings/net/ethernet-controller.yaml This patch can potentially affect boot loaders patching against full node path instead of using device aliases. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16ARM: tegra: Add OPP tables and power domains to Tegra20 device-treesDmitry Osipenko1-1/+2
Add OPP tables and power domains to all peripheral devices which support power management on Tegra20 SoC. Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20 Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-15ARM: tegra: Add compatible string for built-in ASIX on Colibri boardsThierry Reding1-0/+1
The device tree node for the built-in ASIX Ethernet device on Colibri boards needs a compatible string in order to pass DT schema validation. Add the USB VID,PID compatible string as required by the DT schema for USB devices. Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14ARM: tegra: Avoid pwm- prefix in pinmux nodesThierry Reding1-2/+2
The "pwm-" prefix currently matches the DT schema for PWM controllers and throws an error in that case. This is something that should be fixed in the PWM DT schema, but in this case we can also preempt any such conflict by naming the nodes after the pins like we do for many others of these nodes. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14ARM: tegra: Rename CPU and EMC OPP table device-tree nodesDmitry Osipenko1-1/+1
OPP table name now should start with "opp-table" and OPP entries shouldn't contain commas and @ signs in accordance to the new schema requirement. Reorganize CPU and EMC OPP table device-tree nodes. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14ARM: tegra: Drop reg-shift for Tegra HS UARTThierry Reding1-0/+2
When the Tegra High-Speed UART is used instead of the regular UART, the reg-shift property is implied from the compatible string and should not be explicitly listed. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14ARM: tegra: Rename GPIO hog nodes to match schemaThierry Reding1-3/+3
GPIO hog nodes must have a "hog-" prefix or "-hog" suffix according to the DT schema. Rename all such nodes to allow validation to pass. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26ARM: tegra: Add EMC OPP properties to Tegra20 device-treesDmitry Osipenko1-0/+4
Add EMC OPP DVFS tables and update board device-trees by removing unsupported OPPs. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: rename ac97 label to tegra_ac97Marcel Ziswiler1-2/+2
Rename ac97 label to tegra_ac97 to be more in-line with the device tree binding documentation. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: get rid of fake clocks simple busMarcel Ziswiler1-11/+4
Get rid of the fake clocks simple bus and use node names as per the actual schematics. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: rename tps6586x@34 and drop unused pmic labelMarcel Ziswiler1-1/+1
Rename tps6586x@34 to pmic@34 and drop the unused pmic label. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: rename i2c_ddc to hdmi_ddcMarcel Ziswiler1-2/+2
Rename i2c_ddc to hdmi_ddc to be more in-line with other device trees. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: drop module level model and compatibleMarcel Ziswiler1-3/+0
Drop model and compatible nodes from the module level device tree as they get overridden by the carrier board device tree anyway. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: simplify model and compatible propertiesMarcel Ziswiler1-2/+2
Simplify model and compatible by dropping the 256/512 MB from the model and -512 from the compatible properties to be more in-line with all our other device trees. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: add compatibility commentMarcel Ziswiler1-0/+6
Add compatibility comment. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: annotate/move sd card detectMarcel Ziswiler1-4/+0
Annotate the SD card, its detect pin and move the SD card detect GPIO definition from the module to the carrier board more in-line with our other device trees. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: add gpio hogs for gmi_wr_n buffersMarcel Ziswiler1-0/+16
Add GPIO hogs for GMI_WR_N buffers: - tri-stating GMI_WR_N on SODIMM pin 99 nPWE - not tri-stating GMI_WR_N on SODIMM pin 93 RDnWR Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: add gpio hog to unreset usb ethernet chipMarcel Ziswiler1-0/+9
Add GPIO hog to unreset ASIX AX88772B USB Ethernet chip. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: add i2c-thermtripMarcel Ziswiler1-0/+8
Add i2c-thermtrip which would set the SLEEP MODE bit in the SUPPLYENE register of the TPS658643 PMIC. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: annotate/rename lm95245 temperature sensorMarcel Ziswiler1-1/+2
Rename and annotate LM95245 temperature sensor more in-line with our other device trees. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: use high speed uart driverMarcel Ziswiler1-0/+8
Use high speed UART driver compatible nvidia,tegra20-hsuart. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: add missing pinmuxMarcel Ziswiler1-15/+119
Explicitly add pinmux' for all T20 SoC ball groups now: - Colibri Address/Data Bus (GMI) further pins used as GPIOs - Colibri BL_ON - Colibri EXT_IO* - Colibri L_BIAS, LCD_M1 is muxed with LCD_DE today's display need DE, disable LCD_M1 - more Colibri LCD pins (L_* resp. LDD<*>) - Colibri LCD (Optional 24 BPP Support) - Colibri MMCCD - uart_a_dsr and uart_a_dcd as GPIOs - Colibri USB_CDET - I2C3 (Optional) - JTAG_RTCK - LAN_RESET, LAN_EXT_WAKEUP and LAN_PME (All On-module) - more NAND pins - RESET_OUT - THERMD_ALERT# (On-module), unlatched I2C address pin of LM95245 temperature sensor therefore requires disabling for now Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: pinmux clean-upMarcel Ziswiler1-90/+197
Just cosmetic pinmux clean-up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: update sound nvidia,modelMarcel Ziswiler1-1/+1
Update sound nvidia,model to be more in-line with our other device trees. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: indentation/line-feed/white-space clean-upMarcel Ziswiler1-13/+7
Cleaning up indentation, line-feed and white-space. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: remove phy-reset-gpio from controller nodeMarcel Ziswiler1-2/+0
Remove the phy-reset-gpio from the USB controller node as it is already specified in the PHY node. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: annotate usb ehci instancesMarcel Ziswiler1-0/+1
Annotate USB EHCI instances. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: add missing regulatorsMarcel Ziswiler1-0/+1
Add missing regulators: - reg_lan_v_bus being USB Ethernet chip vbus supply - carrier board reg_3v3 to be used as backlight and panel power supply - carrier board HDMI supply being reg_5v0 - reg_usbc_vbus being the USB vbus supply of the EHCI instance 0 Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: regulator clean-upMarcel Ziswiler1-90/+57
Just cosmetic regulator clean-up. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: reorder host1x/hdmi propertiesMarcel Ziswiler1-5/+4
Reorder Host1x/HDMI properties. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: add local-mac-address propertyMarcel Ziswiler1-0/+7
Add empty local-mac-address property to be filled in by boot loader (e.g. U-Boot). Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-09-26ARM: tegra: colibri_t20: move aliases from module to carrier boardMarcel Ziswiler1-5/+0
Move RTC aliases from module to carrier board to be more in-line with all our other device trees. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-07-09ARM: dts: tegra: enable NAND flash on Colibri T20Stefan Agner1-0/+16
This enables the on-module ONFI conformant NAND flash. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-07-09ARM: tegra: Work safely with 256 MB Colibri-T20 modulesKrzysztof Kozlowski1-0/+545
Colibri-T20 can come in 256 MB RAM (with 512 MB NAND) or 512 MB RAM (with 1024 MB NAND) flavors. Both of them will use the same DTSI expecting the bootloader to do the fixup of /memory node. However in case it does not happen, let's stay on safe side by limiting the memory to 256 MB for both versions of Colibri-T20. Rename to remove the unnecessary memory size from the device tree file name. While at it, also follow the typical Toradex SoC, module, carrier board hierarchy. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Stefan Agner <stefan@agner.ch> Tested-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
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