| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2020-05-28 | Merge branch 'for-next/bti' into for-next/core |   Will Deacon | 1 | -0/+37 |
| 2020-05-28 | KVM: arm64: Check advertised Stage-2 page size capability |   Marc Zyngier | 1 | -0/+18 |
| 2020-05-27 | arm64/cpufeature: Add get_arm64_ftr_reg_nowarn() |   Anshuman Khandual | 1 | -10/+34 |
| 2020-05-21 | arm64/cpuinfo: Add ID_MMFR4_EL1 into the cpuinfo_arm64 context | Anshuman Khandual | 1 | -0/+4 |
| 2020-05-21 | arm64/cpufeature: Add remaining feature bits in ID_AA64PFR1 register | Anshuman Khandual | 1 | -0/+2 |
| 2020-05-21 | arm64/cpufeature: Add remaining feature bits in ID_AA64PFR0 register | Anshuman Khandual | 1 | -0/+2 |
| 2020-05-21 | arm64/cpufeature: Add remaining feature bits in ID_AA64ISAR0 register | Anshuman Khandual | 1 | -0/+1 |
| 2020-05-21 | arm64/cpufeature: Add remaining feature bits in ID_MMFR4 register | Anshuman Khandual | 1 | -0/+13 |
| 2020-05-21 | arm64/cpufeature: Add remaining feature bits in ID_PFR0 register | Anshuman Khandual | 1 | -0/+2 |
| 2020-05-21 | arm64/cpufeature: Introduce ID_MMFR5 CPU register | Anshuman Khandual | 1 | -0/+10 |
| 2020-05-21 | arm64/cpufeature: Introduce ID_DFR1 CPU register | Anshuman Khandual | 1 | -0/+10 |
| 2020-05-21 | arm64/cpufeature: Introduce ID_PFR2 CPU register | Anshuman Khandual | 1 | -0/+11 |
| 2020-05-21 | arm64/cpufeature: Make doublelock a signed feature in ID_AA64DFR0 | Anshuman Khandual | 1 | -1/+1 |
| 2020-05-21 | arm64/cpufeature: Drop TraceFilt feature exposure from ID_DFR0 register | Anshuman Khandual | 1 | -1/+1 |
| 2020-05-21 | arm64/cpufeature: Add explicit ftr_id_isar0[] for ID_ISAR0 register | Anshuman Khandual | 1 | -2/+12 |
| 2020-05-20 | arm64/cpufeature: Drop open encodings while extracting parange | Anshuman Khandual | 1 | -1/+2 |
| 2020-05-20 | arm64/cpufeature: Validate hypervisor capabilities during CPU hotplug | Anshuman Khandual | 1 | -0/+32 |
| 2020-05-07 | arm64: Set GP bit in kernel page tables to enable BTI for the kernel |   Mark Brown | 1 | -0/+4 |
| 2020-05-05 | Merge branch 'for-next/bti-user' into for-next/bti | Will Deacon | 1 | -0/+33 |
| 2020-05-05 | arm64: cpufeature: Extend comment to describe absence of field info | Will Deacon | 1 | -0/+5 |
| 2020-04-28 | arm64: cpufeature: Add an overview comment for the cpufeature framework | Will Deacon | 1 | -0/+50 |
| 2020-04-28 | arm64: cpufeature: Relax checks for AArch32 support at EL[0-2] | Will Deacon | 1 | -7/+3 |
| 2020-04-28 | arm64: cpufeature: Relax AArch32 system checks if EL1 is 64-bit only | Will Deacon | 1 | -1/+32 |
| 2020-04-28 | arm64: cpufeature: Factor out checking of AArch32 features | Will Deacon | 1 | -47/+65 |
| 2020-04-28 | arm64: cpufeature: Remove redundant call to id_aa64pfr0_32bit_el0() | Will Deacon | 1 | -3/+1 |
| 2020-04-28 | arm64: cpufeature: Add CPU capability for AArch32 EL1 support | Will Deacon | 1 | -0/+12 |
| 2020-04-28 | arm64: cpufeature: Spell out register fields for ID_ISAR4 and ID_PFR1 | Will Deacon | 1 | -2/+26 |
| 2020-04-28 | arm64: cpufeature: Relax check for IESB support |   Sai Prakash Ranjan | 1 | -1/+1 |
| 2020-03-25 | Merge branch 'for-next/kernel-ptrauth' into for-next/core |   Catalin Marinas | 1 | -22/+71 |
| 2020-03-25 | Merge branches 'for-next/memory-hotremove', 'for-next/arm_sdei', 'for-next/amu', 'for-next/final-cap-helper', 'for-next/cpu_ops-cleanup', 'for-next/misc' and 'for-next/perf' into for-next/core | Catalin Marinas | 1 | -1/+71 |
| 2020-03-18 | arm64: enable ptrauth earlier |   Kristina Martsenko | 1 | -10/+3 |
| 2020-03-18 | arm64: cpufeature: handle conflicts based on capability | Kristina Martsenko | 1 | -14/+15 |
| 2020-03-18 | arm64: cpufeature: Move cpu capability helpers inside C file |   Amit Daniel Kachhap | 1 | -0/+13 |
| 2020-03-18 | arm64: cpufeature: add pointer auth meta-capabilities | Kristina Martsenko | 1 | -1/+24 |
| 2020-03-18 | arm64: cpufeature: Fix meta-capability cpufeature check | Amit Daniel Kachhap | 1 | -1/+20 |
| 2020-03-17 | arm64: remove redundant blank for '=' operator |   韩科才 | 1 | -1/+1 |
| 2020-03-16 | arm64: Basic Branch Target Identification support |   Dave Martin | 1 | -0/+33 |
| 2020-03-06 | arm64: use activity monitors for frequency invariance |   Ionela Voinescu | 1 | -0/+4 |
| 2020-03-06 | arm64: add support for the AMU extension v1 | Ionela Voinescu | 1 | -0/+66 |
| 2020-01-22 | Merge branch 'for-next/rng' into for-next/core | Will Deacon | 1 | -0/+14 |
| 2020-01-22 | Merge branches 'for-next/acpi', 'for-next/cpufeatures', 'for-next/csum', 'for-next/e0pd', 'for-next/entry', 'for-next/kbuild', 'for-next/kexec/cleanup', 'for-next/kexec/file-kdump', 'for-next/misc', 'for-next/nofpsimd', 'for-next/perf' and 'for-next/scs' into for-next/core | Will Deacon | 1 | -27/+150 |
| 2020-01-22 | arm64: Implement archrandom.h for ARMv8.5-RNG |   Richard Henderson | 1 | -0/+14 |
| 2020-01-15 | arm64: Use register field helper in kaslr_requires_kpti() | Will Deacon | 1 | -3/+3 |
| 2020-01-15 | arm64: Simplify early check for broken TX1 when KASLR is enabled | Will Deacon | 1 | -11/+4 |
| 2020-01-15 | arm64: Use a variable to store non-global mappings decision | Mark Brown | 1 | -3/+52 |
| 2020-01-15 | arm64: Factor out checks for KASLR in KPTI code into separate function | Mark Brown | 1 | -1/+1 |
| 2020-01-15 | arm64: Add initial support for E0PD | Mark Brown | 1 | -0/+22 |
| 2020-01-15 | arm64: Move the LSE gas support detection to Kconfig | Catalin Marinas | 1 | -2/+2 |
| 2020-01-15 | arm64: Introduce ID_ISAR6 CPU register | Anshuman Khandual | 1 | -0/+16 |
| 2020-01-15 | arm64: cpufeature: Export matrix and other features to userspace |   Steven Price | 1 | -0/+19 |
