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path: root/arch/x86/include/asm/pgtable_64_types.h (follow)
AgeCommit message (Expand)AuthorFilesLines
2020-11-24x86: Support kmap_local() forced debuggingThomas Gleixner1-1/+5
2020-08-15x86/mm/64: Do not sync vmalloc/ioremap mappingsJoerg Roedel1-2/+0
2020-08-06Revert "x86/mm/64: Do not sync vmalloc/ioremap mappings"Linus Torvalds1-0/+2
2020-07-27x86/mm/64: Do not sync vmalloc/ioremap mappingsJoerg Roedel1-2/+0
2020-06-02x86/mm/64: implement arch_sync_kernel_mappings()Joerg Roedel1-0/+2
2019-06-08docs: fix broken documentation linksMauro Carvalho Chehab1-1/+1
2018-12-11x86/mm: Fix guard hole handlingKirill A. Shutemov1-0/+5
2018-11-06x86/mm: Move LDT remap out of KASLR region on 5-level pagingKirill A. Shutemov1-3/+1
2018-07-20x86/ldt: Define LDT_END_ADDRJoerg Roedel1-0/+1
2018-07-20x86/pgtable: Move two more functions from pgtable_64.h to pgtable.hJoerg Roedel1-0/+2
2018-05-19x86/mm: Stop pretending pgtable_l5_enabled is a variableKirill A. Shutemov1-5/+9
2018-05-19x86/mm: Unify pgtable_l5_enabled usage in early boot codeKirill A. Shutemov1-3/+10
2018-04-26x86/mm: Make vmemmap and vmalloc base address constants unsigned longJiri Kosina1-4/+4
2018-02-21x86/mm: Optimize boot-time paging mode switching costKirill A. Shutemov1-1/+4
2018-02-16x86/mm: Initialize vmemmap_base at boot-timeKirill A. Shutemov1-6/+3
2018-02-16x86/mm: Adjust vmalloc base and size at boot-timeKirill A. Shutemov1-6/+10
2018-02-14x86/mm: Make MAX_PHYSADDR_BITS and MAX_PHYSMEM_BITS dynamicKirill A. Shutemov1-1/+1
2018-02-14x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variableKirill A. Shutemov1-7/+12
2018-02-14x86/mm: Make LDT_BASE_ADDR dynamicKirill A. Shutemov1-4/+5
2018-02-14x86/mm: Introduce 'pgtable_l5_enabled'Kirill A. Shutemov1-0/+6
2018-02-14x86/mm: Make virtual memory layout dynamic for CONFIG_X86_5LEVEL=yKirill A. Shutemov1-2/+2
2018-02-14mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITSKirill A. Shutemov1-0/+2
2018-01-05x86/kaslr: Fix the vaddr_end messThomas Gleixner1-1/+7
2018-01-04x86/mm: Map cpu_entry_area at the same place on 4/5 levelThomas Gleixner1-2/+2
2018-01-04x86/mm: Set MODULES_END to 0xffffffffff000000Andrey Ryabinin1-1/+1
2017-12-23x86/pti: Put the LDT in its own PGD if PTI is onAndy Lutomirski1-0/+4
2017-12-23x86/mm/64: Make a full PGD-entry size hole in the memory mapAndy Lutomirski1-2/+2
2017-12-22x86/cpu_entry_area: Move it out of the fixmapThomas Gleixner1-19/+28
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman1-0/+1
2017-04-04x86/espfix: Add support for 5-level pagingKirill A. Shutemov1-1/+1
2017-04-04x86/mm: Add basic defines/helpers for CONFIG_X86_5LEVEL=yKirill A. Shutemov1-0/+20
2017-04-04x86/mm: Define virtual memory map for 5-level pagingKirill A. Shutemov1-0/+6
2017-03-16x86/mm: Adapt MODULES_END based on fixmap section sizeThomas Garnier1-1/+2
2017-03-14x86/mm: Extend headers with basic definitions to support 5-level pagingKirill A. Shutemov1-0/+1
2016-08-10x86/mm/64: Enable KASLR for vmemmap memory regionThomas Garnier1-1/+3
2016-07-08x86/mm: Enable KASLR for vmalloc memory regionsThomas Garnier1-4/+11
2015-04-14x86: expose number of page table levels on Kconfig levelKirill A. Shutemov1-1/+0
2014-11-11x86, ptdump: Add section for EFI runtime servicesMathias Krause1-0/+2
2014-04-30x86-64, espfix: Don't leak bits 31:16 of %esp returning to 16-bit stackH. Peter Anvin1-0/+2
2013-10-13x86, kaslr: Raise the maximum virtual address to -1 GiB on x86_64Kees Cook1-1/+1
2013-01-29x86, 64bit: Use a #PF handler to materialize early mappings on demandH. Peter Anvin1-0/+4
2009-05-05x86: 46 bit physical address support on 64 bitsRik van Riel1-4/+4
2009-02-13x86: move more pagetable-related definitions into pgtable*.hJeremy Fitzhardinge1-0/+1
2009-02-11x86: move pte types into pgtable*.hJeremy Fitzhardinge1-0/+16
2009-02-11x86: Split pgtable_64.h into pgtable_64_types.h and pgtable_64.hJeremy Fitzhardinge1-0/+46
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