wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Expand)	Author	Files	Lines
2023-06-12	clk: imx: clk-imx8mn: fix memory leak in imx8mn_clocks_probe	Hao Luo	1	-4/+4
2023-03-31	clk: imx: Let IMX8MN_CLK_DISP_PIXEL set parent rate	Adam Ford	1	-1/+1
2023-01-29	clk: imx: remove clk_count of imx_register_uart_clocks	Peng Fan	1	-1/+1
2022-11-25	clk: imx: rename imx_obtain_fixed_clk_hw() to imx_get_clk_hw_by_name()	Dario Binacchi	1	-6/+6
2022-11-25	clk: imx8mn: fix imx8mn_enet_phy_sels clocks list	Dario Binacchi	1	-2/+2
2022-11-25	clk: imx8mn: fix imx8mn_sai2_sels clocks list	Dario Binacchi	1	-1/+1
2022-11-25	clk: imx: rename video_pll1 to video_pll	Dario Binacchi	1	-48/+48
2022-11-25	clk: imx: replace osc_hdmi with dummy	Dario Binacchi	1	-6/+6
2022-11-25	clk: imx8mn: rename vpu_pll to m7_alt_pll	Dario Binacchi	1	-8/+8
2022-04-12	clk: imx8mn: add GPT support	Alvin Šipraga	1	-0/+38
2022-04-12	clk: imx: Remove the snvs clock	Jacky Bai	1	-1/+0
2022-04-12	clk: imx: add mcore_booted module paratemter	Peng Fan	1	-0/+2
2022-03-04	clk: imx8mn: remove SYS PLL 1/2 clock gates	Peng Fan	1	-34/+16
2021-11-22	clk: imx8mn: Fix imx8mn_clko1_sels	Adam Ford	1	-3/+3
2021-08-24	clk: imx8mn: Add M7 core clock	Marek Vasut	1	-0/+5
2021-08-24	clk: imx8m: fix clock tree update of TF-A managed clocks	Ahmad Fatoum	1	-3/+4
2021-08-24	clk: imx8mn: use correct mux type for clkout path	Lucas Stach	1	-2/+2
2021-04-04	clk: imx: Fix reparenting of UARTs not associated with stdout	Adam Ford	1	-16/+2
2021-01-30	clk: imx8mn: add clkout1/2 support	Lucas Stach	1	-0/+12
2020-12-21	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux	Linus Torvalds	1	-1/+1
2020-11-10	clk: imx8mn: drop of_match_ptr from of_device_id table	Krzysztof Kozlowski	1	-1/+1
2020-11-04	clk: imx8m: fix bus critical clk registration	Peng Fan	1	-3/+3
2020-08-22	clk: imx8m: Support module build	Anson Huang	1	-0/+4
2020-05-21	clk: imx: use imx8m_clk_hw_composite_bus for i.MX8M bus clk slice	Peng Fan	1	-8/+8
2020-05-20	clk: imx8m: migrate A53 clk root to use composite core	Peng Fan	1	-3/+3
2020-05-20	clk: imx8m: drop clk_hw_set_parent for A53	Peng Fan	1	-3/+0
2020-03-11	clk: imx8mn: A53 core clock no need to be critical	Anson Huang	1	-4/+4
2020-02-24	clk: imx: imx8mn: fix a53 cpu clock	Peng Fan	1	-4/+12
2020-02-19	clk: imx8mn: Remove unused includes	Anson Huang	1	-2/+0
2020-02-17	clk: imx8mn: Add missing of_node_put()	Anson Huang	1	-0/+1
2020-02-17	clk: imx: Include clk-provider.h instead of clk.h for i.MX8M SoCs clock driver	Anson Huang	1	-1/+1
2020-02-14	clk: imx: imx8mn: use imx8m_clk_hw_composite_core	Peng Fan	1	-8/+11
2020-02-13	clk: imx8mn: add SNVS clock to clock tree	Horia Geantă	1	-0/+1
2019-12-23	clk: imx: imx8mn: Switch to clk_hw based API	Peng Fan	1	-238/+251
2019-12-11	clk: imx8mn: correct the usb1_ctrl parent to be usb_bus	Li Jun	1	-1/+1
2019-12-09	clk: imx8m: Suppress bind attrs	Leonard Crestez	1	-0/+5
2019-12-09	clk: imx: Mark dram pll on 8mm and 8mn with CLK_GET_RATE_NOCACHE	Leonard Crestez	1	-1/+1
2019-12-09	clk: imx8m: Set CLK_GET_RATE_NOCACHE on dram clocks	Leonard Crestez	1	-2/+8
2019-12-01	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux	Linus Torvalds	1	-118/+48
2019-11-27	Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next	Stephen Boyd	1	-104/+48
2019-10-28	clk: imx8m: Use SYS_PLL1_800M as intermediate parent of CLK_ARM	Leonard Crestez	1	-1/+1
2019-10-25	clk: imx: imx8mn: mark sys_pll1/2 as fixed clock	Peng Fan	1	-26/+20
2019-10-25	clk: imx8mn: Define gates for pll1/2 fixed dividers	Leonard Crestez	1	-19/+38
2019-10-16	clk: imx: imx8mn: drop unused pll enum	Peng Fan	1	-14/+0
2019-10-06	clk: imx8mn: Use common 1443X/1416X PLL clock structure	Anson Huang	1	-79/+10
2019-09-17	clk: imx: imx8mn: fix pll mux bit	Peng Fan	1	-22/+10
2019-08-24	clk: imx: imx8mn: fix audio pll setting	Peng Fan	1	-2/+2
2019-08-19	clk: imx8mn: Add necessary frequency support for ARM PLL table	Anson Huang	1	-0/+2
2019-08-19	clk: imx8mn: Add missing rate_count assignment for each PLL structure	Anson Huang	1	-0/+7
2019-08-19	clk: imx8mn: fix int pll clk gate	Peng Fan	1	-6/+6