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path: root/drivers/clk/qcom/clk-rpmh.c (follow)
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2022-02-24clk: qcom: rpmhcc: add sc8280xp support to the RPMh clock controllerBjorn Andersson1-0/+18
The Qualcomm SC8280XP platform exposes 5 clocks through the RPMh clock controller. Add these, and the relates active-only variants, to the RPMh clock controller driver. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20220223044516.3776637-2-bjorn.andersson@linaro.org
2021-12-06clk: qcom: rpmh: add support for SM8450 rpmh clocksVinod Koul1-0/+27
This adds the RPMH clocks present in SM8450 SoC Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211201072310.3968679-5-vkoul@kernel.org
2021-12-03clk: qcom: Add support for SDX65 RPMh clocksVamsi krishna Lanka1-0/+25
Add support for clocks maintained by RPMh in SDX65 SoCs. Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/366448562ac52c600c45b5a15129d78b5e8dd5a7.1638402361.git.quic_vamslank@quicinc.com
2021-08-28clk: qcom: rpmh: Add support for RPMH clocks on SM6350Konrad Dybcio1-0/+21
Add support for RPMH clocks on SM6350 SoCs. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210820203243.230157-3-konrad.dybcio@somainline.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-04-12clk: qcom: rpmh: add support for SDX55 rpmh IPA clockAlex Elder1-0/+2
The IPA core clock is required for SDX55. Define it. Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20210409134407.841137-1-elder@linaro.org Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-03-13clk: qcom: rpmh: Update the XO clock source for SC7280Taniya Das1-2/+5
The bi_tcxo clock source for SC7280 requires a div 4 to derive 19.2MHz from the xo_board. Thus update the same. Fixes: fff2b9a65162 ("clk: qcom: rpmh: Add support for RPMH clocks on SC7280") Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lore.kernel.org/r/1615400283-20100-1-git-send-email-tdas@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-14clk: qcom: rpmh: Add support for RPMH clocks on SC7280Taniya Das1-1/+23
Add support for RPMH clocks on SC7280 SoCs. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lore.kernel.org/r/1612977230-11566-3-git-send-email-tdas@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08clk: qcom: rpmhcc: Add sc8180x rpmh clocksBjorn Andersson1-0/+25
Add clocks provides by RPMH in the Qualcomm SC8180x platform. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210120223741.1610344-2-bjorn.andersson@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-12-10clk: qcom: rpmh: add support for SM8350 rpmh clocksVinod Koul1-12/+46
This adds the RPMH clocks present in SM8350 SoC Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20201208064702.3654324-3-vkoul@kernel.org [sboyd@kernel.org: Move sdx55 to the right place] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-12-07clk: qcom: Add support for SDX55 RPMh clocksManivannan Sadhasivam1-0/+20
Add support for following clocks maintained by RPMh in SDX55 SoCs. * BI TCXO * RF_CLK1 * RF_CLK1_AO * RF_CLK2 * RF_CLK2_AO * QPIC (Qualcomm Technologies, Inc. Parallel Interface Controller) Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20201126072844.35370-5-manivannan.sadhasivam@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-11-24clk: qcom: rpmh: Add CE clock on sdm845.Thara Gopinath1-0/+2
Qualcomm CE clock resource that is managed by BCM is required by crypto driver to access the core clock. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org> Link: https://lore.kernel.org/r/20201119155233.3974286-3-thara.gopinath@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-03-24clk: qcom: rpmh: Drop unnecessary semicolonsStephen Boyd1-4/+4
Some functions end in }; which is just bad style. Remove the extra semicolon. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> Link: https://lkml.kernel.org/r/20200309221232.145630-3-sboyd@kernel.org
2020-03-24clk: qcom: rpmh: Simplify clk_rpmh_bcm_send_cmd()Stephen Boyd1-19/+14
This function has some duplication in unlocking a mutex and returns in a few different places. Let's use some if statements to consolidate code and make this a bit easier to read. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> CC: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> Link: https://lkml.kernel.org/r/20200309221232.145630-2-sboyd@kernel.org
2020-03-09clk: qcom: clk-rpmh: Wait for completion when enabling clocksMike Tipton1-2/+13
The current implementation always uses rpmh_write_async, which doesn't wait for completion. That's fine for disable requests since there's no immediate need for the clocks and they can be disabled in the background. However, for enable requests we need to ensure the clocks are actually enabled before returning to the client. Otherwise, clients can end up accessing their HW before the necessary clocks are enabled, which can lead to bus errors. Use the synchronous version of this API (rpmh_write) for enable requests in the active set to ensure completion. Completion isn't required for sleep/wake sets, since they don't take effect until after we enter sleep. All rpmh requests are automatically flushed prior to entering sleep. Fixes: 9c7e47025a6b ("clk: qcom: clk-rpmh: Add QCOM RPMh clock driver") Signed-off-by: Mike Tipton <mdtipton@codeaurora.org> Link: https://lkml.kernel.org/r/20200215021232.1149-1-mdtipton@codeaurora.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> [sboyd@kernel.org: Reorg code a bit for readability, rename to 'wait' to make local variable not conflict with completion.h mechanism] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-02-12clk: qcom: rpmh: Add support for RPMH clocks on SM8250Taniya Das1-1/+24
Add support for RPMH clocks on SM8250. Reviewed-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org> Link: https://lkml.kernel.org/r/1579905147-12142-3-git-send-email-vnkgutta@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-01-28clk: qcom: rpmh: Sort OF match tableBjorn Andersson1-1/+1
sc7180 was added to the end of the match table, sort the table. Fixes: eee28109f871 ("clk: qcom: clk-rpmh: Add support for RPMHCC for SC7180") Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lkml.kernel.org/r/20200124175934.3937473-1-bjorn.andersson@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-01-06clk: qcom: rpmh: Add IPA clock for SC7180Taniya Das1-0/+1
The Qualcomm IP Accelerator (IPA) clock resource that is managed by the BCM is required by the IPA driver in order to scale its core clock. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lkml.kernel.org/r/1578305923-29125-3-git-send-email-tdas@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-01-06clk: qcom: rpmh: skip undefined clocks when registeringTaniya Das1-1/+6
When iterating over a platform's available clocks in clk_rpmh_probe(), check for undefined (null) entries in the clocks array. Not all clock indexes necessarily have clocks defined. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lkml.kernel.org/r/1578305923-29125-2-git-send-email-tdas@codeaurora.org [sboyd@kernel.org: Leave 'name' declaration at beginning of loop] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-12-05Merge branch 'thermal/next' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linuxLinus Torvalds1-1/+1
Pull thermal management updates from Zhang Rui: - Fix a deadlock regression in thermal core framework, which was introduced in 5.3 (Wei Wang) - Initialize thermal control framework earlier to enable thermal mitigation during boot (Amit Kucheria) - Convert the Intelligent Power Allocator (IPA) thermal governor to follow the generic PM_EM instead of its own Energy Model (Quentin Perret) - Introduce a new Amlogic soc thermal driver (Guillaume La Roque) - Add interrupt support for tsens thermal driver (Amit Kucheria) - Add support for MSM8956/8976 in tsens thermal driver (AngeloGioacchino Del Regno) - Add support for r8a774b1 in rcar thermal driver (Biju Das) - Add support for Thermal Monitor Unit v2 in qoriq thermal driver (Yuantian Tang) - Some other fixes/cleanups on thermal core framework and soc thermal drivers (Colin Ian King, Daniel Lezcano, Hsin-Yi Wang, Tian Tao) * 'thermal/next' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux: (32 commits) thermal: Fix deadlock in thermal thermal_zone_device_check thermal: cpu_cooling: Migrate to using the EM framework thermal: cpu_cooling: Make the power-related code depend on IPA PM / EM: Declare EM data types unconditionally arm64: defconfig: Enable CONFIG_ENERGY_MODEL drivers: thermal: tsens: fix potential integer overflow on multiply thermal: cpu_cooling: Reorder the header file thermal: cpu_cooling: Remove pointless dependency on CONFIG_OF thermal: no need to set .owner when using module_platform_driver thermal: qcom: tsens-v1: Fix kfree of a non-pointer value cpufreq: qcom-hw: Move driver initialization earlier clk: qcom: Initialize clock drivers earlier cpufreq: Initialize cpufreq-dt driver earlier cpufreq: Initialize the governors in core_initcall thermal: Initialize thermal subsystem earlier thermal: Remove netlink support dt: thermal: tsens: Document compatible for MSM8976/56 thermal: qcom: tsens-v1: Add support for MSM8956 and MSM8976 MAINTAINERS: add entry for Amlogic Thermal driver thermal: amlogic: Add thermal driver to support G12 SoCs ...
2019-11-08clk: qcom: rpmh: Reuse sdm845 clks for sm8150Stephen Boyd1-20/+14
The SM8150 list of clks is almost the same as the list for SDM845, except there isn't an IPA clk. Just point to the SDM845 clks from the SM8150 list for now so we can reduce the amount of struct bloat in this driver. Suggested-by: Vinod Koul <vkoul@kernel.org> Cc: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> Link: https://lkml.kernel.org/r/20191107214018.184105-1-sboyd@kernel.org Reviewed-by: Vinod Koul <vkoul@kernel.org>
2019-11-07clk: qcom: clk-rpmh: Add support for RPMHCC for SC7180Taniya Das1-0/+19
Add support for clock RPMh driver to vote for ARC and VRM managed clock resources. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lkml.kernel.org/r/1572371299-16774-4-git-send-email-tdas@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-11-07clk: qcom: Initialize clock drivers earlierAmit Kucheria1-1/+1
Initialize the clock drivers on sdm845 and qcs404 in core_initcall so we can have earlier access to cpufreq during booting. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/75ae9c3a1c0e69b95818c6ffe7181fdeaaf2d70e.1571656015.git.amit.kucheria@linaro.org
2019-09-20Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxLinus Torvalds1-4/+38
Pull clk updates from Stephen Boyd: "We have a small collection of core framework updates this time, mostly around clk registration by clk providers and debugfs "nice to haves" for rate constraints. I'll highlight that we're now setting the clk_init_data pointer inside struct clk_hw to NULL during clk_register(), which may break some drivers that thought they could use that pointer during normal operations. That change has been sitting in next for a while now but maybe something is still broken. We'l see. Other than that the core framework changes aren't invasive and they're fixing bugs, simplifying, and making things better. On the clk driver side we got the usual addition of new SoC support, new features for existing drivers, and bug fixes scattered throughout. The biggest diffstat is the Amlogic driver that gained CPU clk support in addition to migrating to the new way of specifying clk parents. After that the Qualcomm, i.MX, Mediatek, and Rockchip clk drivers got support for various new SoCs and clock controllers from those vendors. Core: - Drop NULL checks in clk debugfs - Add min/max rates to clk debugfs - Set clk_init_data pointer inside clk_hw to NULL after registration - Make clk_bulk_get_all() return an 'id' corresponding to clock-names - Evict parents from parent cache when they're unregistered New Drivers: - Add clock driver for i.MX8MN SoCs - Support aspeed AST2600 SoCs - Support for Mediatek MT6779 SoCs - Support qcom SM8150 GCC and RPMh clks - Support qcom QCS404 WCSS clks - Add CPU clock support for Armada 7K/8K (specifically AP806 and AP807) - Addition of clock driver for Rockchip rk3308 SoCs Updates: - Add regulator support to the cdce925 clk driver - Add support for Raspberry Pi 4 bcm2711 SoCs - Add SDIO gate support to aspeed driver - Add missing of_node_put() calls in various clk drivers - Migrate Amlogic driver to new clock parent description method - Add DVFS support to Amlogic Meson g12 - Add Amlogic Meson g12a reset support to the axg audio clock controller - Add sm1 support to the Amlogic Meson g12a clock controller - Switch i.MX8MM clock driver to platform driver - Add Hifi4 DSP related clocks for i.MX8QXP SoC - Fix Audio PLL setting and parent clock for USB - Misc i.MX8 clock driver improvements and corrections - Set floor ops for Qualcomm SD clks so that rounding works - Fix "always-on" Clock Domains on Renesas R-Car M1A, RZ/A1, RZ/A2, and RZ/N1 - Enable the Allwinner V3 SoC and fix the i2s clock for H6" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (137 commits) clk: Drop !clk checks in debugfs dumping clk: imx: imx8mn: fix pll mux bit clk: imx: imx8mm: fix pll mux bit clk: imx: clk-pll14xx: unbypass PLL by default clk: imx: pll14xx: avoid glitch when set rate clk: mvebu: ap80x: add AP807 clock support clk: mvebu: ap806: Prepare the introduction of AP807 clock support clk: mvebu: ap806: add AP-DCLK (hclk) to system controller driver clk: mvebu: ap806: be more explicit on what SaR is clk: mvebu: ap80x-cpu: add AP807 CPU clock support clk: mvebu: ap806-cpu: prepare mapping of AP807 CPU clock dt-bindings: ap806: Document AP807 clock compatible dt-bindings: ap80x: Document AP807 CPU clock compatible clk: sprd: add missing kfree clk: at91: allow 24 Mhz clock as input for PLL clk: Make clk_bulk_get_all() return a valid "id" clk: actions: Fix factor clk struct member access clk: qcom: rcg: Return failure for RCG update clk: remove extra ---help--- tags in Kconfig clk: add include guard to clk-conf.h ...
2019-09-19Merge branches 'clk-init-destroy', 'clk-doc', 'clk-imx' and 'clk-allwinner' into clk-nextStephen Boyd1-2/+2
- Set clk_init_data pointer inside clk_hw to NULL after registration * clk-init-destroy: clk: Overwrite clk_hw::init with NULL during clk_register() clk: sunxi: Don't call clk_hw_get_name() on a hw that isn't registered clk: ti: Don't reference clk_init_data after registration clk: qcom: Remove error prints from DFS registration rtc: sun6i: Don't reference clk_init_data after registration clk: zx296718: Don't reference clk_init_data after registration clk: milbeaut: Don't reference clk_init_data after registration clk: socfpga: deindent code to proper indentation phy: ti: am654-serdes: Don't reference clk_init_data after registration clk: sprd: Don't reference clk_init_data after registration clk: socfpga: Don't reference clk_init_data after registration clk: sirf: Don't reference clk_init_data after registration clk: qcom: Don't reference clk_init_data after registration clk: meson: axg-audio: Don't reference clk_init_data after registration clk: lochnagar: Don't reference clk_init_data after registration clk: actions: Don't reference clk_init_data after registration * clk-doc: clk: remove extra ---help--- tags in Kconfig clk: add include guard to clk-conf.h clk: Document of_parse_clkspec() some more clk: Remove extraneous 'for' word in comments * clk-imx: (32 commits) clk: imx: imx8mn: fix pll mux bit clk: imx: imx8mm: fix pll mux bit clk: imx: clk-pll14xx: unbypass PLL by default clk: imx: pll14xx: avoid glitch when set rate clk: imx: imx8mn: fix audio pll setting clk: imx8mn: Add necessary frequency support for ARM PLL table clk: imx8mn: Add missing rate_count assignment for each PLL structure clk: imx8mn: fix int pll clk gate clk: imx8mn: Add GIC clock clk: imx8mn: Fix incorrect parents clk: imx8mm: Fix incorrect parents clk: imx8mq: Fix sys3 pll references clk: imx8mq: Unregister clks when of_clk_add_provider failed clk: imx8mm: Unregister clks when of_clk_add_provider failed clk: imx8mq: Mark AHB clock as critical clk: imx8mn: Keep uart clocks on for early console clk: imx: Remove unused function statement clk: imx7ulp: Make sure earlycon's clock is enabled clk: imx8mm: Switch to platform driver clk: imx: imx8mm: fix audio pll setting ... * clk-allwinner: clk: sunxi-ng: h6: Allow I2S to change parent rate clk: sunxi-ng: v3s: add Allwinner V3 support clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocks dt-bindings: clk: sunxi-ccu: add compatible string for V3 CCU clk: sunxi-ng: v3s: add the missing PLL_DDR1
2019-09-09clk: qcom: clk-rpmh: Add support for SM8150Vinod Koul1-0/+28
Add support for rpmh clocks found in SM8150 Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lkml.kernel.org/r/20190826173120.2971-5-vkoul@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-09-09clk: qcom: clk-rpmh: Convert to parent data schemeVinod Koul1-2/+8
Convert the rpmh clock driver to use the new parent data scheme by specifying the parent data for board clock. Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lkml.kernel.org/r/20190826173120.2971-3-vkoul@kernel.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-08-20drivers: qcom: Add BCM vote macro to headerJordan Crouse1-13/+3
The macro to generate a Bus Controller Manager (BCM) TCS command is used by the interconnect driver but might also be interesting to other drivers that need to construct TCS commands for sub processors so move it out of the sdm845 specific file and into the header. Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
2019-08-16clk: qcom: Don't reference clk_init_data after registrationStephen Boyd1-2/+2
A future patch is going to change semantics of clk_register() so that clk_hw::init is guaranteed to be NULL after a clk is registered. Avoid referencing this member here so that we don't run into NULL pointer exceptions. Cc: Taniya Das <tdas@codeaurora.org> Cc: Andy Gross <agross@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> Link: https://lkml.kernel.org/r/20190731193517.237136-5-sboyd@kernel.org Acked-by: Taniya Das <tdas@codeaurora.org>
2019-02-21clk: qcom: clk-rpmh: Add IPA clock supportDavid Dai1-0/+146
The clk-rpmh driver only supports on and off RPMh clock resources. Let's extend the driver by adding support for clocks that are managed by a different type of RPMh resource known as Bus Clock Manager(BCM). The BCM is a configurable shared resource aggregator that scales performance based on a set of frequency points. The Qualcomm IP Accelerator (IPA) clock is an example of a resource that is managed by the BCM and this a requirement from the IPA driver in order to scale its core clock. Signed-off-by: David Dai <daidavid1@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-07-16clk: qcom: clk-rpmh: Add QCOM RPMh clock driverTaniya Das1-0/+329
Add the RPMh clock driver to control the RPMh managed clock resources on some of the Qualcomm Technologies, Inc. SoCs. Signed-off-by: Taniya Das <tdas@codeaurora.org> [sboyd@kernel.org: Clean up whitespace, indentation, remove cmd_db_ready check] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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