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WireGuard for the Linux kernel
Jason A. Donenfeld
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path:
root
/
drivers
/
clk
/
rockchip
/
clk-cpu.c
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Commit message (
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Author
Files
Lines
2021-03-21
clk: rockchip: support more core div setting
Elaine Zhang
1
-24
/
+29
2021-01-26
clk: rockchip: Remove unused/undocumented struct members from clk-cpu
Lee Jones
1
-4
/
+0
2019-06-19
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Thomas Gleixner
1
-4
/
+1
2017-09-28
clk: rockchip: Remove superfluous error message in rockchip_clk_register_cpuclk()
Markus Elfring
1
-2
/
+0
2016-11-14
clk: rockchip: validity should be checked prior to cpu clock rate change
Elaine Zhang
1
-0
/
+9
2016-05-30
clk: rockchip: fix cpuclk registration error handling
Xing Zheng
1
-2
/
+2
2016-03-27
clk: rockchip: allow varying mux parameters for cpuclk pll-sources
Xing Zheng
1
-11
/
+18
2016-02-15
clk: rockchip: fix coding style for clk-cpu.c
Shawn Lin
1
-1
/
+1
2016-02-15
clk: rockchip: disable alt_parent clk in err cases when registering cpuclk
Shawn Lin
1
-2
/
+4
2015-12-09
clk: rockchip: allow more than 2 parents for cpuclk
Jeffy Chen
1
-2
/
+2
2015-07-20
clk: rockchip: Properly include clk.h
Stephen Boyd
1
-0
/
+1
2015-06-04
clk: make several parent names const
Uwe Kleine-König
1
-1
/
+1
2015-01-17
clk: rockchip: fix deadlock possibility in cpuclk
Heiko Stübner
1
-4
/
+6
2014-09-27
clk: rockchip: add new clock-type for the cpuclk
Heiko Stuebner
1
-0
/
+329