Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2019-11-08 | drivers/clk: convert VL struct to struct_size | 1 | -2/+1 | |
2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 | 1 | -10/+1 | |
2017-08-31 | clk: uniphier: add PXs3 clock data | 1 | -0/+12 | |
2017-08-03 | clk: uniphier: remove sLD3 SoC support | 1 | -12/+4 | |
2017-01-26 | clk: uniphier: continue probing even if some clocks fail to register | 1 | -5/+2 | |
2016-12-07 | clk: uniphier: add CPU-gear change (cpufreq) support | 1 | -0/+3 | |
2016-10-19 | clk: uniphier: rename MIO clock to SD clock for Pro5, PXs2, LD20 SoCs | 1 | -7/+7 | |
2016-10-19 | clk: uniphier: fix memory overrun bug | 1 | -1/+1 | |
2016-10-17 | clk: uniphier: add system clock support for sLD3 SoC | 1 | -0/+4 | |
2016-09-16 | clk: uniphier: add clock data for UniPhier SoCs | 1 | -0/+91 | |
2016-09-16 | clk: uniphier: add core support code for UniPhier clock driver | 1 | -0/+123 |