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path: root/drivers/clk (follow)
AgeCommit message (Expand)AuthorFilesLines
2022-05-25clk: at91: generated: consider range when calculating best rateCodrin Ciubotariu1-0/+4
2022-05-09clk: sunxi: sun9i-mmc: check return value after calling platform_get_resource()Yang Yingliang1-0/+2
2022-04-15clk: Enforce that disjoints limits are invalidMaxime Ripard1-0/+24
2022-04-15clk: si5341: fix reported clk_rate when output divider is 2Adam Wujek1-7/+9
2022-04-15clk: Initialize orphan req_rateMaxime Ripard1-0/+13
2022-04-15clk: qcom: gcc-msm8994: Fix gpll4 widthKonrad Dybcio1-0/+1
2022-04-15clk: tegra: tegra124-emc: Fix missing put_device() call in emc_ensure_emc_driverMiaoqian Lin1-0/+1
2022-04-15clk: clps711x: Terminate clk_div_table with sentinel elementJonathan Neuschäfer1-0/+2
2022-04-15clk: loongson1: Terminate clk_div_table with sentinel elementJonathan Neuschäfer1-0/+1
2022-04-15clk: actions: Terminate clk_div_table with sentinel elementJonathan Neuschäfer2-1/+2
2022-04-15clk: qcom: clk-rcg2: Update the frac table for pixel clockTaniya Das1-0/+1
2022-04-15clk: qcom: clk-rcg2: Update logic to calculate D value for RCGTaniya Das1-2/+11
2022-04-15clk: imx7d: Remove audio_mclk_root_clkAbel Vesa1-1/+0
2022-04-15clk: qcom: ipq8074: Use floor ops for SDCC1 clockDirk Buchwalder1-1/+1
2022-04-15clk: uniphier: Fix fixed-rate initializationKunihiko Hayashi1-0/+1
2022-03-16clk: qcom: gdsc: Add support to update GDSC transition delayTaniya Das2-6/+28
2022-03-02clk: jz4725b: fix mmc0 clock gatingSiarhei Volkau1-2/+1
2022-01-27clk: si5341: Fix clock HW provider cleanupRobert Hancock1-1/+1
2022-01-27clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBBMartin Blumenstingl1-3/+41
2022-01-27clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shellDillon Min1-4/+0
2022-01-27clk: imx8mn: Fix imx8mn_clko1_selsAdam Ford1-3/+3
2022-01-27clk: bcm-2835: Remove rounding up the dividersMaxime Ripard1-8/+3
2022-01-27clk: bcm-2835: Pick the closest clock rateMaxime Ripard1-1/+1
2021-12-22clk: Don't parent clks until the parent is fully registeredMike Tipton1-3/+12
2021-12-14clk: qcom: regmap-mux: fix parent clock lookupDmitry Baryshkov3-1/+15
2021-11-26clk: qcom: gcc-msm8996: Drop (again) gcc_aggre1_pnoc_ahb_clkDmitry Baryshkov1-15/+0
2021-11-26clk/ast2600: Fix soc revision for AHBJoel Stanley1-5/+7
2021-11-26clk: ingenic: Fix bugs with divided dividersPaul Cercueil1-3/+3
2021-11-26clk: imx: imx6ul: Move csi_sel mux to correct base registerStefan Riedmueller1-1/+1
2021-11-17clk: at91: check pmc node status before registering syscore opsClément Léger1-0/+5
2021-11-17clk: mvebu: ap-cpu-clk: Fix a memory leak in error handling pathsChristophe JAILLET1-3/+11
2021-09-22clk: at91: clk-generated: Limit the requested rate to our rangeCodrin Ciubotariu1-0/+6
2021-09-22clk: at91: clk-generated: pass the id of changeable parent at registrationClaudiu Beznea5-35/+37
2021-09-22clk: at91: sam9x60: Don't use audio PLLCodrin Ciubotariu1-6/+3
2021-09-15clk: kirkwood: Fix a clocking boot regressionLinus Walleij1-0/+1
2021-08-12clk: fix leak on devm_clk_bulk_get_all() unwindBrian Norris1-1/+8
2021-08-12clk: stm32f4: fix post divisor setup for I2S/SAI PLLsDario Binacchi1-5/+5
2021-07-19clk: tegra: Ensure that PLLU configuration is applied properlyDmitry Osipenko1-5/+4
2021-07-19clk: renesas: r8a77995: Add ZA2 clockKuninori Morimoto1-0/+1
2021-07-14clk: si5341: Update initialization magicRobert Hancock1-1/+3
2021-07-14clk: si5341: Avoid divide errors due to bogus register contentsRobert Hancock1-2/+13
2021-07-14clk: actions: Fix bisp_factor_table based clocks on Owl S500 SoCCristian Ciocaltea1-15/+29
2021-07-14clk: actions: Fix SD clocks factor table on Owl S500 SoCCristian Ciocaltea1-4/+2
2021-07-14clk: actions: Fix UART clock dividers on Owl S500 SoCCristian Ciocaltea1-6/+6
2021-07-14clk: meson: g12a: fix gp0 and hifi rangesJerome Brunet1-1/+1
2021-06-23clocksource/drivers/timer-ti-dm: Handle dra7 timer wrap errata i940Tony Lindgren1-0/+1
2021-05-19clk: exynos7: Mark aclk_fsys1_200 as criticalPaweł Chmiel1-1/+6
2021-05-14clk: uniphier: Fix potential infinite loopColin Ian King1-2/+2
2021-05-14clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLEChen Hui1-0/+1
2021-05-14clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callbackQuanyang Wang1-6/+6