wireguard-linux - WireGuard for the Linux kernel

Age	Commit message (Collapse)	Author	Files	Lines
2020-03-09	drm/amd/display: dcn20: remove an unused function	Melissa Wen	1	-78/+0
	The dpp2_get_optimal_number_of_taps function is never used. Removing just for code cleaning up. Signed-off-by: Melissa Wen <melissa.srw@gmail.com> Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-01-16	drm/amd/display: Double buffer dcn2 Gamut Remap	Noah Abradjian	1	-1/+1
	[Why] When rapidly adjusting color temperature, screen tearing was observed. This was due to overwritten values in gamut remap registers. This issue was solved for OCSC and ICSC by alternating between "A" and "B" registers to double buffer the writes. [How] Create new set_gamut_remap and program_gamut_remap for dcn20. Alternate which registers are written to by switching modes each time. Also fixes ICSC mode reg read to use proper data offset. Signed-off-by: Noah Abradjian <noah.abradjian@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-01-16	drm/amd/display: Fix double buffering in dcn2 ICSC	Noah Abradjian	1	-12/+12
	[Why] When rapidly adjusting video brightness, screen tearing was observed. This was due to overwritten values in ICSC registers. In dcn10, this issue had been fixed by implementing double buffering via alternating ICSC modes. However, the second register set used in dcn1 doesn't exist in dcn2. [How] Create new program_input_csc for dcn20. Use ICSC_B registers instead of COMA registers as second set. Signed-off-by: Noah Abradjian <noah.abradjian@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-10	drm/amd/display: Use dcn1 Optimal Taps Get	Wesley Chalmers	1	-1/+1
	[WHY] dpp2_get_optimal_number_of_taps is incorrect, and dcn2 should be using dpp1_get_optimal_number_of_taps instead Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-10-07	drm/amd/display: Remove set but not used variable 'pixel_width'	zhengbin	1	-7/+0
	Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c: In function dpp2_get_optimal_number_of_taps: drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c:359:11: warning: variable pixel_width set but not used [-Wunused-but-set-variable] It is not used since commit f7de96ee8b5f ("drm/amd/display: Add DCN2 DPP") Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23	drm/amd/display: add Cursor Degamma logic for DCN2	Bayan Zabihiyan	1	-3/+7
	[Why] We need to have the ability to to tell us set degamma on the cursor. [How] Pass a flag down to register programming that tells us if the current surface format needs cursor degamma. Signed-off-by: Bayan Zabihiyan <bayan.zabihiyan@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-15	drm/amd/display: wake up ogam mem pwr before programming ocsc	Charlene Liu	1	-0/+16
	[Description] OGAM_MEM_PWR could stay in light up when driver woke up to update gamma. either disable MEM_LOW power feature or set to OGAM_bypass could make artificial color distortion goes away. Easy reproduce after LOW_MEM Power feature enables and resume from S3. Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Julian Parkin <jparkin@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-06-22	drm/amd/display: Make sure line size is not zero in DCN2 line buffer size calculations	Nikola Cornij	1	-4/+13
	[why] 'Divide by zero' error happens when line size happens to be zero. [how] The code that makes sure line size minimum value can be 1 was already present in DCN1 part of the driver, this is mearly a port to DCN2. Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-06-21	drm/amd/display: Add DCN2 DPP	Harry Wentland	1	-0/+493
	Add support to program the DCN2 DPP (Multiple pipe and plane combine) HW Blocks: +--------+ \| DPP \| +--------+ \| v +--------+ \| MPC \| +--------+ \| v +-------+ \| OPP \| +-------+ \| v +--------+ \| OPTC \| +--------+ \| v +--------+ +--------+ \| DIO \| \| DCCG \| +--------+ +--------+ Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>