Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2020-06-03 | drm/amd/display: Add dcn30 Headers (v2) | Jerry (Fangzhi) Zuo | 4 | -0/+92947 |
2020-01-16 | drm/amd/include: Add OCSC registers | Rodrigo Siqueira | 4 | -2/+24 |
2019-12-18 | drm/amdgpu: move dpcs headers to dpcs includes | Roman Li | 2 | -3995/+0 |
2019-10-17 | drm/amd/display: Add DP_DPHY_INTERNAL_CTR regs | Bhawanpreet Lakha | 1 | -0/+10 |
2019-08-29 | drm/amd/display: Add Renoir registers (v3) | Bhawanpreet Lakha | 4 | -0/+74495 |
2019-06-22 | drm/amd/display: Create DWB resource for DCN2 | Charlene Liu | 2 | -0/+20 |
2019-06-20 | drm/amdgpu: add DCN 2.0 register headers | Hawking Zhang | 2 | -0/+85539 |
2019-04-23 | drm/amd/include: Add HUBPREQ_DEBUG register offsets | Leo Li | 1 | -0/+8 |
2018-04-11 | drm/amdgpu: Add CM_TEST_DEBUG regs for DCN | Harry Wentland | 2 | -3/+24 |
2018-02-19 | drm/amd/display: Adding missing TMZ sh/mask entries for DCN1 SURFACE_CONTROL | Harry Wentland | 1 | -0/+14 |
2017-12-06 | drm/amd/include:cleanup raven1 dcn header files. | Feifei Xu | 2 | -0/+68414 |