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2022-09-21Merge tag 'drm-intel-next-2022-09-16-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie1-6/+9
drm/i915 feature pull #2 for v6.1: Features and functionality: - More Meteorlake platform enabling (Radhakrishna, Imre, Madhumitha) - Allow seamless M/N changes on eDP panels that support it (Ville) - Switch DSC debugfs from output bpp to input bpc (Swati) Refactoring and cleanups: - Clocking and DPLL refactoring and cleanups to support seamless M/N (Ville) - Plenty of VBT definition and parsing updates and cleanups (Ville) - Extract SKL watermark code to a separate file, and clean up (Ville) - Clean up IPC interfaces and debugfs (Jani) - Continue moving display data under drm_i915_private display sub-struct (Jani) - Display quirk handling refactoring and abstractions (Jani) - Stop using implicit dev_priv in gmbus registers (Jani) - BUG_ON() removals and conversions to drm_WARN_ON() and BUILD_BUG_ON() (Jani) - Use drm_dp_phy_name() for logging (Jani) - Use REG_BIT() macros for CDCLK registers (Stan) - Move display and media IP versions to runtime info (Radhakrishna) Fixes: - Fix DP MST suspend to avoid use-after-free (Andrzej) - Fix HPD suspend to avoid use-after-free for fbdev (Andrzej) - Fix various PSR issues regarding selective update and damage clips (Jouni) - Fix runtime pm wakerefs for driver remove and release (Mitul Golani) - Fix conditions for filtering fixed modes for panels (Ville) - Fix TV encoder clock computation (Ville) - Fix dvo mode_valid hook return type (Nathan Huckleberry) Merges: - Backmerge drm-next to sync the DP MST atomic changes (Jani) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/87o7vfr064.fsf@intel.com
2022-09-21Merge tag 'drm-intel-gt-next-2022-09-16' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie1-0/+3
Cross-subsystem Changes: - MEI subsystem pieces for XeHP SDV GSC support These are Acked-by Greg. Driver Changes: - Release mmaps on RPM suspend on discrete GPUs (Anshuman) - Update GuC version to 7.5 on DG1, DG2 and ADL - Revert "drm/i915/dg2: extend Wa_1409120013 to DG2" (Lucas) - MTL enabling incl. standalone media (Matt R, Lucas) - Explicitly clear BB_OFFSET for new contexts on Gen8+ (Chris) - Fix throttling / perf limit reason decoding (Ashutosh) - XeHP SDV GSC support (Vitaly, Alexander, Tomas) - Fix issues with overrding firmware file paths (John) - Invert if-else ladders to check latest version first (Lucas) - Cancel GuC engine busyness worker synchronously (Umesh) - Skip applying copy engine fuses outside PVC (Lucas) - Eliminate Gen10 frequency read function (Lucas) - Static code checker fixes (Gaosheng) - Selftest improvements (Chris) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/YyQ4Jgl3cpGL1/As@jlahtine-mobl.ger.corp.intel.com
2022-09-15Merge tag 'drm-intel-next-2022-08-29' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie1-35/+47
drm/i915 feature pull for v6.1: Features and functionality: - Early Meteorlake (MTL) enabling (José, Radhakrishna, Clint, Imre, Vandita, Ville, Jani) - Support more HDMI pixel clock frequencies on DG2 (Clint) - Sanity check PCI BARs (Piotr Piórkowski) - Enable DC5 on DG2 (Anusha) - DG2 DMC firmware version bump to v2.07 (Madhumitha) - New ADL-S PCI ID (José) Refactoring and cleanups: - Add display sub-struct to struct drm_i915_private (Jani) - Add initial runtime info to device info (Jani) - Split out HDCP and backlight registers to separate files (Jani) Fixes: - Skip wm/ddb readout for disabled pipes (Ville) - HDMI port timing quirk for GLK ECS Liva Q2 (Diego Santa Cruz) - Fix bw init null pointer dereference (Łukasz Bartosik) - Disable PPS power hook for DP AUX backlight (Jouni) - Avoid warnings on registering multiple backlight devices (Arun) - Fix dual-link DSI backlight and CABC ports for display 11+ (Jani) - Fix Type-C PHY ownership programming in HDMI legacy mode (Imre) - Fix unclaimed register access while loading PIPEDMC-C/D (Imre) - Bump up CDCLK for DG2 (Stan) - Prune modes that require HDMI 2.1 FRL (Ankit) - Disable FBC when PSR1 is enabled in display 12-13 (Matt) - Fix TGL+ HDMI transcoder clock and DDI BUF disable order (Imre) - Disable PSR before disable pipe (José) - Disable DMC handlers during firmware loading/disabling on display 12+ (Imre) - Disable clock gating for PIPEDMC-A/B as a workaround (Imre) Merges: - Two drm-next backmerges (Rodrigo, Jani) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/87k06rfaku.fsf@intel.com
2022-09-12drm/i915: Move display and media IP version to runtime infoRadhakrishna Sripada1-6/+9
Future platforms can read the IP version from a register and the IP version numbers need not be hard coded in device info. Move the ip version for media and display to runtime info. On platforms where hard coding of IP version is required, update the IP version in __runtime under device_info. v2: - Avoid name collision for ip versions(Jani) v4.1: - Fix build error in mock_gem_device.c v4.2: - Use ip instead of version for ip_vesion member.(MattR) Suggested-by: Jani Nikula <jani.nikula@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220902221054.173524-1-radhakrishna.sripada@intel.com
2022-09-12drm/i915: Prepare more multi-GT initializationMatt Roper1-0/+3
We're going to introduce an additional intel_gt for MTL's media unit soon. Let's provide a bit more multi-GT initialization framework in preparation for that. The initialization will pull the list of GTs for a platform from the device info structure. Although necessary for the immediate MTL media enabling, this same framework will also be used farther down the road when we enable remote tiles on xehpsdv and pvc. v2: - Re-add missing test for !HAS_EXTRA_GT_LIST in intel_gt_probe_all(). v3: - Move intel_gt_definition struct to intel_gt_types.h. (Jani) - Drop gtdef->setup(). For now we'll just use a switch() based on GT type since we don't have too many different handlers for the foreseeable future. (Jani) Cc: Aravind Iddamsetty <aravind.iddamsetty@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Aravind Iddamsetty <aravind.iddamsetty@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220906234934.3655440-6-matthew.d.roper@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
2022-09-12Merge tag 'drm-intel-gt-next-2022-09-09' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie1-0/+1
UAPI Changes: - Revert "drm/i915/dg2: Add preemption changes for Wa_14015141709" The intent of Wa_14015141709 was to inform us that userspace can no longer control object-level preemption as it has on past platforms (i.e., by twiddling register bit CS_CHICKEN1[0]). The description of the workaround in the spec wasn't terribly well-written, and when we requested clarification from the hardware teams we were told that on the kernel side we should also probably stop setting FF_SLICE_CS_CHICKEN1[14], which is the register bit that directs the hardware to honor the settings in per-context register CS_CHICKEN1. It turns out that this guidance about FF_SLICE_CS_CHICKEN1[14] was a mistake; even though CS_CHICKEN1[0] is non-operational and useless to userspace, there are other bits in the register that do still work and might need to be adjusted by userspace in the future (e.g., to implement other workarounds that show up). If we don't set FF_SLICE_CS_CHICKEN1[14] in i915, then those future workarounds would not take effect. Even more details at: https://lists.freedesktop.org/archives/intel-gfx/2022-September/305478.html Driver Changes: - Align GuC/HuC firmware versioning scheme to kernel practices (John) - Fix #6639: h264 hardware video decoding broken in 5.19 on Intel(R) Celeron(R) N3060 (Nirmoy) - Meteorlake (MTL) enabling (Matt R) - GuC SLPC improvements (Vinay, Rodrigo) - Add thread execution tuning setting for ATS-M (Matt R) - Don't start PXP without mei_pxp bind (Juston) - Remove leftover verbose debug logging from GuC error capture (John) - Abort suspend on low system memory conditions (Nirmoy, Matt A, Chris) - Add DG2 Wa_16014892111 (Matt R) - Rename ggtt_view as gtt_view (Niranjana) - Consider HAS_FLAT_CCS() in needs_ccs_pages (Matt A) - Don't try to disable host RPS when this was never enabled. (Rodrigo) - Clear stalled GuC CT request after a reset (Daniele) - Remove runtime info printing from GuC time stamp logging (Jani) - Skip Bit12 fw domain reset for gen12+ (Sushma, Radhakrishna) - Make GuC log sizes runtime configurable (John) - Selftest improvements (Daniele, Matt B, Andrzej) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/YxshfqUN+vDe92Zn@jlahtine-mobl.ger.corp.intel.com
2022-08-30drm/i915/ats-m: Add thread execution tuning settingMatt Roper1-0/+1
On client DG2 platforms, optimal performance is achieved with the hardware's default "age based" thread execution setting. However on ATS-M, switching this to "round robin after dependencies" provides better performance. We'll add a new "tuning" feature flag to the ATS-M device info to enable/disable this setting. Bspec: 68331 Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220826212718.409948-1-matthew.d.roper@intel.com
2022-08-24drm/i915: move has_dsc to runtime infoJani Nikula1-1/+1
If it's modified runtime, it's runtime info. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/0e2646e5fdaad2785678b4f140091b3d91b97f7e.1660910433.git.jani.nikula@intel.com
2022-08-24drm/i915: move has_dmc to runtime infoJani Nikula1-1/+1
If it's modified runtime, it's runtime info. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/b8f69cd1b6114295826c1f88be27e867c91f7df4.1660910433.git.jani.nikula@intel.com
2022-08-24drm/i915: move has_hdcp to runtime infoJani Nikula1-1/+2
If it's modified runtime, it's runtime info. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/b146250e02a4b2f086e7e587dd1742589e0e8fba.1660910433.git.jani.nikula@intel.com
2022-08-24drm/i915: move pipe_mask and cpu_transcoder_mask to runtime infoJani Nikula1-2/+3
If it's modified runtime, it's runtime info. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/bff2ea209031063cec38085518508394b064df4a.1660910433.git.jani.nikula@intel.com
2022-08-24drm/i915: move platform_engine_mask to runtime infoJani Nikula1-2/+2
If it's modified runtime, it's runtime info. mock_gem_device() is the only one that modifies it. If that could be fixed, we wouldn't have to do this. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1261406b373998c1a171ee9ed91f7f562826eba6.1660910433.git.jani.nikula@intel.com
2022-08-24drm/i915: move memory_regions to runtime infoJani Nikula1-2/+2
If it's modified runtime, it's runtime info. mock_gem_device() is the only one that modifies it. If that could be fixed, we wouldn't have to do this. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/12aace656c6a6380575767d7f6ccd73c12a627c3.1660910433.git.jani.nikula@intel.com
2022-08-24drm/i915: move has_pooled_eu to runtime infoJani Nikula1-1/+2
If it's modified runtime, it's runtime info. Curiously, the flag was never initialized statically. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/db6d47abd87c74ae5f5be1cda62af13518c896fb.1660910433.git.jani.nikula@intel.com
2022-08-24drm/i915: move ppgtt_type and ppgtt_size to runtime infoJani Nikula1-3/+3
If it's modified runtime, it's runtime info. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/9a9b94cb79a00229da5a564a16ea750a6d392ab6.1660910433.git.jani.nikula@intel.com
2022-08-24drm/i915: move page_sizes to runtime infoJani Nikula1-2/+2
If it's modified runtime, it's runtime info. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f6825dd97d2ba63aa395c30131c4b9e6ef32b0c8.1660910433.git.jani.nikula@intel.com
2022-08-24drm/i915: move fbc_mask to runtime infoJani Nikula1-4/+8
If it's modified runtime, it's runtime info. v2: Rebase on mtl fbc_mask Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/dd1898084b732ba265b212ddbc0fcdd826c11820.1660910433.git.jani.nikula@intel.com
2022-08-24drm/i915: move graphics.ver and graphics.rel to runtime infoJani Nikula1-1/+2
If it's modified runtime, it's runtime info. mock_gem_device() is the only one that modifies them. If that could be fixed, we wouldn't have to do this. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/6bdf6cc0d67e3ed8042d2b92303351111147ba47.1660910433.git.jani.nikula@intel.com
2022-08-24drm/i915: add initial runtime info into device infoJani Nikula1-18/+23
Add initial runtime info that we can copy to runtime info at i915 creation time. This lets us define the initial values for runtime info statically while making it possible to change them runtime. This will be the new home for the current "const" device info members that are modified runtime anyway. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/a77c6db2da20d401f47a0a5e87356b9b3f6292df.1660910433.git.jani.nikula@intel.com
2022-08-24drm/i915: combine device info printing into oneJani Nikula1-4/+3
We'll be moving info between static and runtime info. Combine the printing functions into one to keep the output sensible and (mostly) unchanged in the process. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Maarten Lankhort <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/8579bfe0fcc5ee8390d4cded68a0167a618097f5.1660910433.git.jani.nikula@intel.com
2022-07-22Merge tag 'drm-intel-gt-next-2022-07-13' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie1-0/+5
Driver uAPI changes: - All related to the Small BAR support: (and all by Matt Auld) * add probed_cpu_visible_size * expose the avail memory region tracking * apply ALLOC_GPU only by default * add NEEDS_CPU_ACCESS hint * tweak error capture on recoverable contexts Driver highlights: - Add Small BAR support (Matt) - Add MeteorLake support (RK) - Add support for LMEM PCIe resizable BAR (Akeem) Driver important fixes: - ttm related fixes (Matt Auld) - Fix a performance regression related to waitboost (Chris) - Fix GT resets (Chris) Driver others: - Adding GuC SLPC selftest (Vinay) - Fix ADL-N GuC load (Daniele) - Add platform workaround (Gustavo, Matt Roper) - DG2 and ATS-M device ID updates (Matt Roper) - Add VM_BIND doc rfc with uAPI documentation (Niranjana) - Fix user-after-free in vma destruction (Thomas) - Async flush of GuC log regions (Alan) - Fixes in selftests (Chris, Dan, Andrzej) - Convert to drm_dbg (Umesh) - Disable OA sseu config param for newer hardware (Umesh) - Multi-cast register steering changes (Matt Roper) - Add lmem_bar_size modparam (Priyanka) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/Ys85pcMYLkqF/HtB@intel.com
2022-07-12Merge tag 'drm-intel-next-2022-07-06' of git://anongit.freedesktop.org/drm/drm-intel into drm-nextDave Airlie1-19/+20
- Suspend fixes for Display (Jose) - Properly block D3Cold for now (Anshuman) - Eliminate PIPECONF RMWs from .color_commit()(Ville) - Display info clean-up (Ville) - Fix error code (Dan) - Fix possible refcount leak on DP MST (Hangyu) - Other general display clean-ups (Jani, Tom) - Add bios debug logs (Jani) - PCH type clean-up (Ville) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/YsZNJUVh0iHOtORz@intel.com
2022-07-08drm/i915/mtl: Add MeteorLake PCI IDsRadhakrishna Sripada1-0/+4
Add Meteorlake PCI IDs. Split into M, and P subplatforms. v2: Update PCI id's v3: Move id 7d60 under MTL_M(MattR) Bspec: 55420 Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220708000335.2869311-3-radhakrishna.sripada@intel.com
2022-07-08drm/i915/mtl: Add MeteorLake platform infoRadhakrishna Sripada1-0/+1
MTL has Xe_LPD+ display IP (version = 14), MTL graphics IP (version = 12.70), and Xe_LPM+ media IP (version = 13). Bspec: 55413 Bspec: 55416 Bspec: 55417 Bspec: 55418 Bspec: 55726 Bspec: 45544 Bspec: 65380 v2: rearrange the fields in pci_info(MattR) Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> [mattrope: Moved IS_METEORLAKE() higher in header] Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220708000335.2869311-2-radhakrishna.sripada@intel.com
2022-06-27drm/i915: Move the color stuff under INTEL_INFO->displayVille Syrjälä1-8/+7
The LUTs are a display feature so move the details into the display portion of the device info. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220623130900.26078-10-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-06-27drm/i915: Make pipe_offsets[] & co. u32Ville Syrjälä1-3/+3
Using a signed type for the register offsets doesn't really make sense. Switch to u32. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220623130900.26078-5-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-06-27drm/i915: Move display_mmio_offset under INTEL_INFO->displayVille Syrjälä1-2/+3
The display register offsets are display stuff so stick into the display portion of the device info. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220623130900.26078-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-06-27drm/i915: Move pipe_offsets[] & co. to INTEL_INFO->displayVille Syrjälä1-5/+5
The display register offsets are display stuff so stick into the display portion of the device info. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220623130900.26078-3-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-06-27drm/i915: Move dbuf details to INTEL_INFO->displayVille Syrjälä1-4/+5
DBUF is a display thing, so move it into the display portion of the device info. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220623130900.26078-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2022-06-09drm/i915/pvc: Add register steeringMatt Roper1-1/+1
Ponte Vecchio no longer has MSLICE or LNCF steering, but the bspec does document several new types of multicast register ranges. Fortunately, most of the different MCR types all provide valid values at instance (0,0) so there's no need to read fuse registers and calculate a non-terminated instance. We'll lump all of those range types (BSLICE, HALFBSLICE, TILEPSMI, CC, and L3BANK) into a single category called "INSTANCE0" to keep things simple. We'll also perform explicit steering for each of these multicast register types, even if the implicit steering setup for COMPUTE/DSS ranges would have worked too; this is based on guidance from our hardware architects who suggested that we move away from implicit steering and start explicitly steer all MCR register accesses on modern platforms (we'll work on transitioning COMPUTE/DSS to explicit steering in the future). Note that there's one additional MCR range type defined in the bspec (SQIDI) that we don't handle here. Those ranges use a different steering control register that we never touch; since instance 0 is also always a valid setting there, we can just ignore those ranges. Finally, we'll rename the HAS_MSLICES() macro to HAS_MSLICE_STEERING(). PVC hardware still has units referred to as mslices, but there's no register steering based on mslice for this platform. v2: - Rebase on other recent changes - Swap two table rows to keep table sorted & easy to read. (Harish) Bspec: 67609 Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Harish Chegondi <harish.chegondi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220608170700.4026648-1-matthew.d.roper@intel.com
2022-06-02drm/i915/pvc: Add SSEU changesMatt Roper1-0/+1
PVC splits the mask of enabled DSS over two registers. It also changes the meaning of the EU fuse register such that each bit represents a single EU rather than a pair of EUs. Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220601150725.521468-7-matthew.d.roper@intel.com
2022-05-24drm/i915/pvc: Remove additional 3D flags from PIPE_CONTROLStuart Summers1-0/+1
Although we already strip 3D-specific flags from PIPE_CONTROL instructions when submitting to a compute engine, there are some additional flags that need to be removed when the platform as a whole lacks a 3D pipeline. Add those restrictions here. v2: - Replace LACKS_3D_PIPELINE checks with !HAS_3D_PIPELINE and add has_3d_pipeline to all platforms except PVC. (Lucas) Bspec: 47112 Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Stuart Summers <stuart.summers@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220511060228.1179450-4-matthew.d.roper@intel.com
2022-05-23Merge tag 'drm-intel-next-2022-05-20' of git://anongit.freedesktop.org/drm/drm-intel into drm-intel-gt-nextTvrtko Ursulin1-3/+9
drm/i915 drm-intel-next -> drm-intel-gt-next cross-merge sync Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> # Conflicts: # drivers/gpu/drm/i915/gt/intel_rps.c # drivers/gpu/drm/i915/i915_vma.c From: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/87y1ywbh5y.fsf@intel.com
2022-05-20drm/i915: Introduce has_media_ratio_modeAshutosh Dixit1-0/+1
Media ratio mode (the ability for media IP to work at a different frequency from the GT) is available for a subset of dGfx platforms supporting GuC/SLPC. Introduce 'has_media_ratio_mode' flag in intel_device_info to identify these platforms and set it for XEHPSDV and DG2/ATS-M. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220519085732.1276255-1-tvrtko.ursulin@linux.intel.com [tursulin: fixup merge conflict]
2022-05-20Revert "drm/i915: Drop has_gt_uc from device info"Tvrtko Ursulin1-0/+1
This reverts commit 222ff6db8a0dcb86f2bb65fc8656aec635a737a6. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220519090802.1294691-8-tvrtko.ursulin@linux.intel.com
2022-05-20Revert "drm/i915: Drop has_rc6 from device info"Tvrtko Ursulin1-0/+1
This reverts commit 218076abbcd647de46635d21331a34b814f90906. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220519090802.1294691-7-tvrtko.ursulin@linux.intel.com
2022-05-20Revert "drm/i915: Drop has_reset_engine from device info"Tvrtko Ursulin1-0/+1
This reverts commit 922abe4d19bd21b38298f3902674774b92a49293. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220519090802.1294691-6-tvrtko.ursulin@linux.intel.com
2022-05-20Revert "drm/i915: Drop has_logical_ring_elsq from device info"Tvrtko Ursulin1-0/+1
This reverts commit b6411373d3954c8fe4617c27f90f773108b0ab03. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220519090802.1294691-5-tvrtko.ursulin@linux.intel.com
2022-05-20Revert "drm/i915: Drop has_ddi from device info"Tvrtko Ursulin1-0/+1
This reverts commit efd01cd3c27636bc4840057a03839e54abaf11dc. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220519090802.1294691-4-tvrtko.ursulin@linux.intel.com
2022-05-20Revert "drm/i915: Drop has_dp_mst from device info"Tvrtko Ursulin1-0/+1
This reverts commit eb86f645ab9b90c47de7ebe229feae7ac999421b. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220519090802.1294691-3-tvrtko.ursulin@linux.intel.com
2022-05-20Revert "drm/i915: Drop has_psr from device info"Tvrtko Ursulin1-0/+1
This reverts commit b15a7357a84f091fde8ce35bf2fd494150ad4bd0. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220519090802.1294691-2-tvrtko.ursulin@linux.intel.com
2022-05-10drm/i915/pvc: Define MOCS table for PVCAyaz A Siddiqui1-0/+1
v2 (MattR): - Clarify comment above RING_CMD_CCTL programming. - Remove bspec reference from field definition. (Lucas) - Add WARN if we try to use a (presumably uninitialized) wb_index of 0. On most platforms 0 is an invalid MOCS entry and even on the ones where it isn't, it isn't the right setting for wb_index. (Lucas) Bspec: 45101, 72161 Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com> Signed-off-by: Fei Yang <fei.yang@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505213812.3979301-4-matthew.d.roper@intel.com
2022-05-06drm/i915: Drop has_psr from device infoJosé Roberto de Souza1-1/+0
No need to have this parameter in intel_device_info struct as all platforms with display version 9 or newer has this feature. As a side effect of the of removal this flag, it will not be printed in dmesg during driver load anymore and developers will have to rely on to check the macro and compare with platform being used and IP versions of it. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-7-jose.souza@intel.com
2022-05-06drm/i915: Drop has_dp_mst from device infoJosé Roberto de Souza1-1/+0
No need to have this parameter in intel_device_info struct as the requirement to support it is the DDI support. As a side effect of the of removal this flag, it will not be printed in dmesg during driver load anymore and developers will have to rely on to check the macro and compare with platform being used and IP versions of it. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-6-jose.souza@intel.com
2022-05-06drm/i915: Drop has_ddi from device infoJosé Roberto de Souza1-1/+0
No need to have this parameter in intel_device_info struct as all platforms with display version 9 or newer, haswell or broadwell supports it. As a side effect of the of removal this flag, it will not be printed in dmesg during driver load anymore and developers will have to rely on to check the macro and compare with platform being used and IP versions of it. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-5-jose.souza@intel.com
2022-05-06drm/i915: Drop has_logical_ring_elsq from device infoJosé Roberto de Souza1-1/+0
No need to have this parameter in intel_device_info struct as all platforms with graphics version 11 or newer has this feature. As a side effect of the of removal this flag, it will not be printed in dmesg during driver load anymore and developers will have to rely on to check the macro and compare with platform being used and IP versions of it. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-4-jose.souza@intel.com
2022-05-06drm/i915: Drop has_reset_engine from device infoJosé Roberto de Souza1-1/+0
No need to have this parameter in intel_device_info struct as all platforms with graphics version 7 or newer can reset engines. As a side effect of the of removal this flag, it will not be printed in dmesg during driver load anymore and developers will have to rely on to check the macro and compare with platform being used and IP versions of it. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-3-jose.souza@intel.com
2022-05-06drm/i915: Drop has_rc6 from device infoJosé Roberto de Souza1-1/+0
No need to have this parameter in intel_device_info struct as all platforms with graphics version 6 or newer have software support for this feature. As a side effect of the of removal this flag, it will not be printed in dmesg during driver load anymore and developers will have to rely on to check the macro and compare with platform being used and IP versions of it. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-2-jose.souza@intel.com
2022-05-06drm/i915: Drop has_gt_uc from device infoJosé Roberto de Souza1-1/+0
No need to have this parameter in intel_device_info struct as all platforms with graphics version 9 or newer has graphics microcontroller. As a side effect of the of removal this flag, it will not be printed in dmesg during driver load anymore and developers will have to rely on to check the macro and compare with platform being used and IP versions of it. Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-1-jose.souza@intel.com
2022-05-03drm/i915/pvc: add initial Ponte Vecchio definitionsStuart Summers1-0/+1
Additional blitter and media engines will be enabled later. Bspec: 44481, 44482 Signed-off-by: Stuart Summers <stuart.summers@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220502163417.2635462-2-matthew.d.roper@intel.com
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