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2026-02-03drm/xe/pm: Disable D3Cold for BMG only on specific platformsKarthik Poosa1-3/+10
Restrict D3Cold disablement for BMG to unsupported NUC platforms, instead of disabling it on all platforms. Signed-off-by: Karthik Poosa <karthik.poosa@intel.com> Fixes: 3e331a6715ee ("drm/xe/pm: Temporarily disable D3Cold on BMG") Link: https://patch.msgid.link/20260123173238.1642383-1-karthik.poosa@intel.com Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-02-03drm/pan*: don't abuse current->group_leaderOleg Nesterov2-2/+2
Cleanup and preparation to simplify the next changes. Use current->tgid instead of current->group_leader->pid. Link: https://lkml.kernel.org/r/aXY_0MrQBZWKbbmA@redhat.com Signed-off-by: Oleg Nesterov <oleg@redhat.com> Acked-by: Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Steven Price <steven.price@arm.com> Cc: Alice Ryhl <aliceryhl@google.com> Cc: Christan König <christian.koenig@amd.com> Cc: David S. Miller <davem@davemloft.net> Cc: Eric Dumazet <edumazet@google.com> Cc: Felix Kuehling <felix.kuehling@amd.com> Cc: Jakub Kicinski <kuba@kernel.org> Cc: Leon Romanovsky <leon@kernel.org> Cc: Paolo Abeni <pabeni@redhat.com> Cc: Simon Horman <horms@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2026-02-03drm/amd: kill the outdated "Only the pthreads threading model is supported" checksOleg Nesterov2-13/+0
Nowadays task->group_leader->mm != task->mm is only possible if a) task is not a group leader and b) task->group_leader->mm == NULL because task->group_leader has already exited using sys_exit(). I don't think that drm/amd tries to detect/nack this case. Link: https://lkml.kernel.org/r/aXY_yLVHd63UlWtm@redhat.com Signed-off-by: Oleg Nesterov <oleg@redhat.com> Reviewed-by: Christan König <christian.koenig@amd.com> Acked-by: Felix Kuehling <felix.kuehling@amd.com> Cc: Alice Ryhl <aliceryhl@google.com> Cc: Boris Brezillon <boris.brezillon@collabora.com> Cc: David S. Miller <davem@davemloft.net> Cc: Eric Dumazet <edumazet@google.com> Cc: Jakub Kicinski <kuba@kernel.org> Cc: Leon Romanovsky <leon@kernel.org> Cc: Paolo Abeni <pabeni@redhat.com> Cc: Simon Horman <horms@kernel.org> Cc: Steven Price <steven.price@arm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2026-02-03drm/amdgpu: don't abuse current->group_leaderOleg Nesterov2-2/+2
Cleanup and preparation to simplify the next changes. - Use current->tgid instead of current->group_leader->pid - Use get_task_pid(current, PIDTYPE_TGID) instead of get_task_pid(current->group_leader, PIDTYPE_PID) Link: https://lkml.kernel.org/r/aXY_wKewzV5lCa5I@redhat.com Signed-off-by: Oleg Nesterov <oleg@redhat.com> Acked-by: Felix Kuehling <felix.kuehling@amd.com> Cc: Alice Ryhl <aliceryhl@google.com> Cc: Boris Brezillon <boris.brezillon@collabora.com> Cc: Christan König <christian.koenig@amd.com> Cc: David S. Miller <davem@davemloft.net> Cc: Eric Dumazet <edumazet@google.com> Cc: Jakub Kicinski <kuba@kernel.org> Cc: Leon Romanovsky <leon@kernel.org> Cc: Paolo Abeni <pabeni@redhat.com> Cc: Simon Horman <horms@kernel.org> Cc: Steven Price <steven.price@arm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2026-02-03drm/bridge: imx8qxp-pixel-combiner: Fix bailout for imx8qxp_pc_bridge_probe()Liu Ying1-1/+1
In case the channel0 is unavailable and bailing out from free_child is needed when we fail to add a DRM bridge for the available channel1, pointer pc->ch[0] in the bailout path would be NULL and it would be dereferenced as pc->ch[0]->bridge.next_bridge. Fix this by checking pc->ch[0] before dereferencing it. Fixes: ae754f049ce1 ("drm/bridge: imx8qxp-pixel-combiner: get/put the next bridge") Fixes: 99764593528f ("drm/bridge: imx8qxp-pixel-combiner: convert to devm_drm_bridge_alloc() API") Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260123-imx8qxp-drm-bridge-fixes-v1-3-8bb85ada5866@nxp.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2026-02-03drm/bridge: analogix_dp: Move &drm_bridge_funcs.mode_set to &drm_bridge_funcs.atomic_enableDamon Ding1-79/+82
According to the include/drm/drm_bridge.h, the callback &drm_bridge_funcs.mode_set is deprecated and it should be better to include the mode setting in the &drm_bridge_funcs.atomic_enable instead. Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Tested-by: Heiko Stuebner <heiko@sntech.de> (on rk3588) Link: https://patch.msgid.link/20251217093321.3108939-4-damon.ding@rock-chips.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2026-02-03drm/bridge: analogix_dp: Formalize the struct analogix_dp_deviceDamon Ding1-2/+2
Use the tap instead of the space for &analogix_dp_device.aux and &analogix_dp_device.force_hpd. Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Tested-by: Heiko Stuebner <heiko@sntech.de> (on rk3588) Link: https://patch.msgid.link/20251217093321.3108939-3-damon.ding@rock-chips.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2026-02-03drm/display: bridge_connector: Ensure last bridge determines EDID/modes detection capabilitiesDamon Ding1-6/+12
When multiple bridges are present, EDID detection capability (DRM_BRIDGE_OP_EDID) takes precedence over modes detection (DRM_BRIDGE_OP_MODES). To ensure the above two capabilities are determined by the last bridge in the chain, we handle three cases: Case 1: The later bridge declares only DRM_BRIDGE_OP_MODES - If the previous bridge declares DRM_BRIDGE_OP_EDID, set &drm_bridge_connector.bridge_edid to NULL and set &drm_bridge_connector.bridge_modes to the later bridge. - Ensure modes detection capability of the later bridge will not be ignored. Case 2: The later bridge declares only DRM_BRIDGE_OP_EDID - If the previous bridge declares DRM_BRIDGE_OP_MODES, set &drm_bridge_connector.bridge_modes to NULL and set &drm_bridge_connector.bridge_edid to the later bridge. - Although EDID detection capability has higher priority, this operation is for balance and makes sense. Case 3: the later bridge declares both of them - Assign later bridge as &drm_bridge_connector.bridge_edid and and &drm_bridge_connector.bridge_modes to this bridge. - Just leave transfer of these two capabilities as before. Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Tested-by: Heiko Stuebner <heiko@sntech.de> (on rk3588) Link: https://patch.msgid.link/20251217093321.3108939-2-damon.ding@rock-chips.com Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
2026-02-03drm/i915/power_well: Enable workaround for DSS clock gating issueMika Kahola4-2/+63
Prevent display corruption observed after restart, hotplug, or unplug operations on Meteor Lake and newer platforms. The issue is caused by DSS clock gating affecting DSC logic when pipe power wells are disabled. Apply this WA by disabling DSS clock gating for the affected pipes before turning off their power wells. This avoids DSC corruption on external displays. v2: Use single intel_de_rmw() (Jani) Switch to use drm_dbg_kms() instead of drm_printf() (Jani) Remove WA number from commit message (Suraj) rename dss_clock_gating_enable_disable() to dss_pipe_gating_enable_disable(); v3: Do not use open ended display version when checking wa (Matt) WA: 22021048059 BSpec: 690991, 666241 Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patch.msgid.link/20260202140242.704234-1-mika.kahola@intel.com
2026-02-03drm/xe/configfs: Add sriov.admin_only_pf attributeMichal Wajdeczko4-1/+69
Instead of relying on fixed relation to the display probe flag, add configfs attribute to allow an administrator to configure desired PF operation mode in a more flexible way. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/20260121214218.2817-6-michal.wajdeczko@intel.com
2026-02-03drm/xe/pf: Define admin_only as real flagMichal Wajdeczko4-2/+12
Instead of doing guesses each time during the runtime, set flag admin_only once during PF's initialization. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/20260127210501.794-1-michal.wajdeczko@intel.com
2026-02-03drm/xe/configfs: Always return consistent max_vfs valueMichal Wajdeczko3-5/+10
The max_vfs parameter used by the Xe driver has its default value definition, but it could be altered by the module parameter or by the device specific configfs attribute. To avoid mistakes or code duplication, always rely on the configfs helper (or stub), which will provide necessary fallback if needed. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/20260121214218.2817-4-michal.wajdeczko@intel.com
2026-02-03drm/xe/configfs: Use proper notation for local includeMichal Wajdeczko1-1/+1
For local includes we should use "" notation, not <>. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/20260121214218.2817-3-michal.wajdeczko@intel.com
2026-02-03drm/xe: Keep all defaults in single headerMichal Wajdeczko4-32/+41
We already have most of Xe defaults defined in xe_module.c, where we use them for the modparam initializations, but some were defined elsewhere, which breaks the consistency. Introduce xe_defaults.h file, that will act as a placeholder for all our default values, and can be used from other places. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/20260121214218.2817-2-michal.wajdeczko@intel.com
2026-02-03drm/panel: ilitek-ili9882t: Remove duplicate initializers in tianma_il79900a_dscNathan Chancellor1-4/+0
Clang warns (or errors with CONFIG_WERROR=y / W=e): drivers/gpu/drm/panel/panel-ilitek-ili9882t.c:95:16: error: initializer overrides prior initialization of this subobject [-Werror,-Winitializer-overrides] 95 | .vbr_enable = 0, | ^ drivers/gpu/drm/panel/panel-ilitek-ili9882t.c:90:16: note: previous initialization is here 90 | .vbr_enable = false, | ^~~~~ drivers/gpu/drm/panel/panel-ilitek-ili9882t.c:97:19: error: initializer overrides prior initialization of this subobject [-Werror,-Winitializer-overrides] 97 | .rc_model_size = DSC_RC_MODEL_SIZE_CONST, | ^~~~~~~~~~~~~~~~~~~~~~~ include/drm/display/drm_dsc.h:22:38: note: expanded from macro 'DSC_RC_MODEL_SIZE_CONST' 22 | #define DSC_RC_MODEL_SIZE_CONST 8192 | ^~~~ drivers/gpu/drm/panel/panel-ilitek-ili9882t.c:91:19: note: previous initialization is here 91 | .rc_model_size = DSC_RC_MODEL_SIZE_CONST, | ^~~~~~~~~~~~~~~~~~~~~~~ include/drm/display/drm_dsc.h:22:38: note: expanded from macro 'DSC_RC_MODEL_SIZE_CONST' 22 | #define DSC_RC_MODEL_SIZE_CONST 8192 | ^~~~ drivers/gpu/drm/panel/panel-ilitek-ili9882t.c:132:25: error: initializer overrides prior initialization of this subobject [-Werror,-Winitializer-overrides] 132 | .initial_scale_value = 32, | ^~ drivers/gpu/drm/panel/panel-ilitek-ili9882t.c:126:25: note: previous initialization is here 126 | .initial_scale_value = 32, | ^~ drivers/gpu/drm/panel/panel-ilitek-ili9882t.c:133:20: error: initializer overrides prior initialization of this subobject [-Werror,-Winitializer-overrides] 133 | .nfl_bpg_offset = 3511, | ^~~~ drivers/gpu/drm/panel/panel-ilitek-ili9882t.c:108:20: note: previous initialization is here 108 | .nfl_bpg_offset = 1402, | ^~~~ GCC would warn about this in the same manner but its version, -Woverride-init, is disabled for a normal kernel build in scripts/Makefile.warn. For clang, -Wextra in drivers/gpu/drm/Makefile turns it back but GCC respects turning it off earlier in the command line. Of all the duplicate fields in the initializer, only nfl_bpg_offset is a different value. Clear up the duplicate initializers, keeping the 'false' value for .vbr_enable, as it is bool, and the second value for .nfl_bpg_offset, assuming it is the correct one since it was the one tested in the original change. Fixes: 65ce1f5834e9 ("drm/panel: ilitek-ili9882t: Switch Tianma TL121BVMS07 to DSC 120Hz mode") Signed-off-by: Nathan Chancellor <nathan@kernel.org> Link: https://patch.msgid.link/20260114-panel-ilitek-ili9882t-fix-override-init-v1-1-1d69a2b096df@kernel.org Signed-off-by: Maxime Ripard <mripard@kernel.org>
2026-02-03drm/i915/display: Extend the max dotclock limit to WCLChaitanya Kumar Borah1-1/+9
Add upper limit check for pixel clock for WCL. For prior platforms though the bspec mentions the dotclock limits, however these are intentionally not enforced to avoid regressions, unless real issues are observed. BSpec: 49199, 68912 Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-18-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/display: Add upper limit check for pixel clockChaitanya Kumar Borah3-0/+15
Add upper limit check for pixel clock for DISPLAY_VER >= 30. Limits don't apply when DSC is enabled. The helper returns the upper limit for the platforms, capped to the max dotclock (khz). For the currently supported versions of HDMI, pixel clock is already limited to 600Mhz so nothing needs to be done there as of now. v2: - Add this limit to the new helper. v3: - Rename helper to intel_max_uncompressed_dotclock(). (Imre) - Limit only for PTL and cap the limit to max_dotclock. (Imre) BSpec: 49199, 68912 Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-17-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp: Add helpers for joiner candidate loopsAnkit Nautiyal3-47/+29
Introduce for_each_joiner_candidate(), intel_dp_joiner_candidate_valid() and intel_dp_joiner_candidate_valid() to remove duplicated joiner enumeration and validity checks across DP SST and MST paths. Suggested-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-16-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp: Account for DSC slice overheadAnkit Nautiyal5-1/+46
Account for DSC slice overhead bubbles and adjust the pixel rate while checking the pixel rate against the max dotclock limits. v2: Add missing assignment for dsc_slice_count in mst_connector_mode_valid_ctx(). (Imre) v3: Explicitly pass dsc_slice_count as 0 for Non-DSC case. (Imre) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-15-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp: Refactor dsc_slice_count handling in intel_dp_mode_valid()Ankit Nautiyal1-7/+7
Make dsc_slice_count closer to the block where it is used and promote it from u8 to int. This aligns it with upcoming DSC bubble pixel-rate adjustments, where the slice count participates in wider arithmetic. Currently, for non-eDP (DP/DP_MST) cases the slice count is computed only inside intel_dp_dsc_mode_valid() and is not used by the caller. Once DSC bubble handling is added, dp_mode_valid() will need access to its own local slice count for non-eDP cases as well. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-14-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp: Introduce helper to check pixel rate against dotclock limitsAnkit Nautiyal3-18/+35
Add intel_dp_dotclk_valid() helper, that checks the required pixel rate against platform dotclock limit. With joined pipes the effective dotclock limit depends upon the number of joined pipes. Call the helper from the mode_valid phase and from the compute_config phase where we need to check the limits for the given target clock for a given joiner candidate. v2: Rename the helper to intel_dp_dotclk_valid(). (Imre) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-13-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp: Remove unused joiner helpersAnkit Nautiyal2-41/+0
The helpers intel_dp_num_joined_pipes() and intel_dp_needs_joiner() are no longer used now that joiner selection iterates over all candidates. Remove them. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-12-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp_mst: Rework pipe joiner logic in compute_configAnkit Nautiyal1-11/+32
Similar to the DP SST, refactor mst_stream_compute_config() to iterate over joiner candidates and select the minimal joiner configuration that satisfies the mode requirements. This prepares the logic for future changes that will consider DSC slice overhead. v2: - Move the check for dotclock in the new helper and check for both DSC and non-DSC case. In case the check fails for non-DSC, fallback to DSC configuration. (Imre) - Propagate the return value from the core helper: mst_stream_compute_link_for_joined_pipes(). (Imre) v3: - Use num_joined_pipes instead of num_pipes. (Imre) v4: - Switch to 'ret == 0' for break condition to match SST code. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-11-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp_mst: Extract helper to compute link for given joiner configAnkit Nautiyal1-25/+48
Move the joiner-dependent portion of mst_stream_compute_config() into mst_stream_compute_link_for_joined_pipes(), which computes the MST link configuration for a specific num_joined_pipes. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-10-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp_mst: Rework pipe joiner logic in mode_validAnkit Nautiyal3-34/+51
Refactor the logic to get the number of joined pipes. Start with a single pipe and incrementally try additional pipes only if needed. While DSC overhead is not yet computed here, this restructuring prepares the code to support that in follow-up changes. v2: - Remove fallback in case force-joiner configuration fails. (Imre) - Drop redundant MODE_OK assignment (Imre) v3: - Align with the changes in intel_dp_mode_valid(). (Imre) v4: - Set MODE_CLOCK_HIGH on DSC/rate failures aligning with SST case. (Imre) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-9-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp_mst: Move the joiner dependent code togetherAnkit Nautiyal1-8/+8
Move the calculation of num_joined_pipes and other constraints that depend on it, into a single block in mst_stream_compute_config(). This groups all joiner-dependent logic together, preparing the code for a future loop-based evaluation of multiple joiner configurations. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-8-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp_mst: Move the check for dotclock at the endAnkit Nautiyal1-5/+13
Refactor the mode_valid to have all joiner dependent stuff together and place the check for dotclock limit at the very end. This will help in the following refactor to iterate over the joiner candidates and find the best joiner candidate that satisfy all checks and limits. v2: Update status to MODE_CLOCK_HIGH if max_dotclock check fails. (Imre) v3: Drop redundant MODE_OK assignment and return. (Imre) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-7-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp: Rework pipe joiner logic in compute_configAnkit Nautiyal1-17/+73
Currently, the number of joined pipes are determined early in the flow, which limits flexibility for accounting DSC slice overhead. To address this, recompute the joined pipe count during DSC configuration. Refactor intel_dp_dsc_compute_config() to iterate over joiner candidates and select the minimal joiner configuration that satisfies the mode requirements. This prepares the logic for future changes that will consider DSC slice overhead. v2: - Rename helper to intel_dp_compute_link_for_joined_pipes(). (Imre) - Move the check for max dotclock inside the helper so that if dotclock check fails for non DSC case for a given number of joined pipes, we are able to fallback to the DSC mode. (Imre) v3: - Drop fallback to other joiner configurations, if the force joiner configuration fails. (Imre) - Check for maxdotclock limit for non-DSC case first and fall back to DSC if the check fails. (Imre) - Initialize ret to -EINVAL to handle case where we bail out early. (Imre) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-6-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp: Rework pipe joiner logic in mode_validAnkit Nautiyal1-46/+93
Currently in intel_dp_mode_valid(), we compute the number of joined pipes required before deciding whether DSC is needed. This ordering prevents us from accounting for DSC-related overhead when determining pipe requirements. It is not possible to first decide whether DSC is needed and then compute the required number of joined pipes, because the two depend on each other: - DSC need is a function of the pipe count (e.g., 4‑pipe always requires DSC; 2‑pipe may require it if uncompressed joiner is unavailable). - Whether a given pipe‑join configuration is sufficient depends on effective bandwidth, which itself changes when DSC is used. As a result, the only correct approach is to iterate candidate pipe counts. So, refactor the logic to start with a single pipe and incrementally try additional pipes only if needed. While DSC overhead is not yet computed here, this restructuring prepares the code to support that in a follow-up changes. If a forced joiner configuration is present, we just check for that configuration. If it fails, we bailout and return instead of trying with other joiner configurations. v2: - Iterate over number of pipes to be joined instead of joiner candidates. (Jani) - Document the rationale of iterating over number of joined pipes. (Imre) v3: - In case the force joiner configuration doesn't work, do not fallback to the normal routine, bailout instead of trying other joiner configurations. (Imre) v4: - Use num_joined_pipes instead of num_pipes. (Imre) - Inititialize status before the loops starts. (Imre) v5: - Fix status handling by setting MODE_CLOCK_HIGH on DSC/rate failures. (Imre) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-5-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp: Extract helper to get the hdisplay limitAnkit Nautiyal1-4/+7
Separate out function to get the hdisplay limit for a given platform. v2: Rename the helper to intel_dp_max_hdisplay_per_pipe(). (Imre) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-4-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp: Move num_joined_pipes and related checks togetherAnkit Nautiyal1-16/+16
Move the calculation of `num_joined_pipes` and other constraints that depend on it, into a single block. This groups all joiner-dependent logic together, preparing the code for a future loop-based evaluation of multiple joiner configurations. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-3-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp: Early reject bad hdisplay in intel_dp_mode_validAnkit Nautiyal1-3/+3
Move check for bad hdisplay early as it is independent on other checks. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260202103731.357416-2-ankit.k.nautiyal@intel.com
2026-02-03drm/i915/dp: Add a meaningful return to intel_dp_read_dsc_dpcdSuraj Kandpal1-11/+18
Add a meaningful return to intel_dp_read_dsc_dpcd. This is to avoid unwanted DPCD reads which are not needed once we know DSC DPCD read fails. To do this convert drm_dp_dpcd_read to drm_dp_dpcd_read_data which returns a meaningful error which can be propogated up when all bits are not read. While we are at it convert the drm_err in intel_dp_read_dsc_dpcd to drm_dbg_kms. This is because we do not want a hard ERROR when we call this function, during the intel_dp_detect phase since AUX may not be up, it is expected to fail but we do not expect a failure in read when we call intel_dp_dsc_get_sink_cap so we move the drm_err there. Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patch.msgid.link/20260202081801.1400708-1-suraj.kandpal@intel.com
2026-02-02drm/xe: add WQ_PERCPU to alloc_workqueue usersMarco Crivellari4-5/+6
This continues the effort to refactor workqueue APIs, which began with the introduction of new workqueues and a new alloc_workqueue flag in: commit 128ea9f6ccfb ("workqueue: Add system_percpu_wq and system_dfl_wq") commit 930c2ea566af ("workqueue: Add new WQ_PERCPU flag") The refactoring is going to alter the default behavior of alloc_workqueue() to be unbound by default. With the introduction of the WQ_PERCPU flag (equivalent to !WQ_UNBOUND), any alloc_workqueue() caller that doesn’t explicitly specify WQ_UNBOUND must now use WQ_PERCPU. For more details see the Link tag below. In order to keep alloc_workqueue() behavior identical, explicitly request WQ_PERCPU. Link: https://lore.kernel.org/all/20250221112 Suggested-by: Tejun Heo <tj@kernel.org> Signed-off-by: Marco Crivellari <marco.crivellari@suse.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/20260202103756.62138-3-marco.crivellari@suse.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-02-02drm/xe: replace use of system_unbound_wq with system_dfl_wqMarco Crivellari5-7/+7
This patch continues the effort to refactor workqueue APIs, which has begun with the changes introducing new workqueues and a new alloc_workqueue flag: commit 128ea9f6ccfb ("workqueue: Add system_percpu_wq and system_dfl_wq") commit 930c2ea566af ("workqueue: Add new WQ_PERCPU flag") The point of the refactoring is to eventually alter the default behavior of workqueues to become unbound by default so that their workload placement is optimized by the scheduler. Before that to happen, workqueue users must be converted to the better named new workqueues with no intended behaviour changes: system_wq -> system_percpu_wq system_unbound_wq -> system_dfl_wq This way the old obsolete workqueues (system_wq, system_unbound_wq) can be removed in the future. Link: https://lore.kernel.org/all/20250221112003.1dSuoGyc@linutronix.de/ Suggested-by: Tejun Heo <tj@kernel.org> Signed-off-by: Marco Crivellari <marco.crivellari@suse.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/20260202103756.62138-2-marco.crivellari@suse.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-02-02drm/xe/guc: Allow second H2G retry on FLRMichal Wajdeczko1-3/+11
During VF FLR the scratch registers could be cleared both by the GuC and by the PF driver. Allow to retry more times once we find out that the HXG header was cleared and wait at least 256ms before resending the same message again to the GuC. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260127193727.601-7-michal.wajdeczko@intel.com
2026-02-02drm/xe/guc: Wait before retrying sending H2GMichal Wajdeczko1-0/+4
We shall resend H2G message after receiving NO_RESPONSE_RETRY reply, but since GuC dropped that H2G due to some interim state, we should give it a little time to stabilize. Wait before sending the same H2G again, start with 1ms delay, then increase exponentially to 256ms. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260127193727.601-6-michal.wajdeczko@intel.com
2026-02-02drm/xe/guc: Drop redundant register readMichal Wajdeczko1-5/+4
The xe_mmio_wait32() already returns the last value of the register for which we were waiting, there is no need read it again. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260127193727.601-5-michal.wajdeczko@intel.com
2026-02-02drm/xe/guc: Limit sleep while waiting for H2G creditsMichal Wajdeczko1-5/+7
Instead of endlessly increasing the sleep timeout while waiting for the H2G credits, use exponential increase only up to the given limit, like it was initially done in the GuC submission code. While here, fix the actual timeout to the 1s as it was documented. Suggested-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260127193727.601-4-michal.wajdeczko@intel.com
2026-02-02drm/xe: Move exponential sleep logic to helperMichal Wajdeczko2-4/+22
We want to reuse the same increased sleep logic in other places. To avoid code duplication, move it to the helper. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260127193727.601-3-michal.wajdeczko@intel.com
2026-02-02drm/xe: Promote relaxed_ms_sleepMichal Wajdeczko2-21/+38
We want to have single place with sleep related helpers for better code reuse. Create xe_sleep.h and move relaxed_ms_sleep() there. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260127193727.601-2-michal.wajdeczko@intel.com
2026-02-02drm/xe/pf: Simplify IS_SRIOV_PF macroMichal Wajdeczko1-5/+2
Instead of two having variants of the IS_SRIOV_PF macro, move the CONFIG_PCI_IOV check to the xe_device_is_sriov_pf() function and let the compiler optimize that. This will help us drop poor man's type check of the macro parameter that fails on const xe pointer. Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Shuicheng Lin <shuicheng.lin@intel.com> Link: https://patch.msgid.link/20260128222714.3056-1-michal.wajdeczko@intel.com
2026-02-02drm/xe: Fix kerneldoc for xe_tlb_inval_job_alloc_depShuicheng Lin1-1/+1
Correct the function name in the kerneldoc. It is for below warning: "Warning: drivers/gpu/drm/xe/xe_tlb_inval_job.c:210 expecting prototype for xe_tlb_inval_alloc_dep(). Prototype was for xe_tlb_inval_job_alloc_dep() instead" Fixes: 15366239e2130 ("drm/xe: Decouple TLB invalidations from GT") Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://patch.msgid.link/20260129233834.419977-8-shuicheng.lin@intel.com
2026-02-02drm/xe: Fix kerneldoc for xe_gt_tlb_inval_init_earlyShuicheng Lin1-1/+1
Correct the function name in the kerneldoc. It is for below warning: "Warning: drivers/gpu/drm/xe/xe_tlb_inval.c:136 expecting prototype for xe_gt_tlb_inval_init(). Prototype was for xe_gt_tlb_inval_init_early() instead" v2: add () for the function. (Michal) Fixes: db16f9d90c1d9 ("drm/xe: Split TLB invalidation code in frontend and backend") Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://patch.msgid.link/20260129233834.419977-7-shuicheng.lin@intel.com
2026-02-02drm/xe: Fix kerneldoc for xe_migrate_exec_queueShuicheng Lin1-1/+1
Correct the function name in the kerneldoc. It is for below warning: "Warning: drivers/gpu/drm/xe/xe_migrate.c:1262 expecting prototype for xe_get_migrate_exec_queue(). Prototype was for xe_migrate_exec_queue() instead" Fixes: 916ee4704a865 ("drm/xe/vf: Register CCS read/write contexts with Guc") Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://patch.msgid.link/20260129233834.419977-6-shuicheng.lin@intel.com
2026-02-02drm/xe/query: Fix topology query pointer advanceShuicheng Lin1-1/+1
The topology query helper advanced the user pointer by the size of the pointer, not the size of the structure. This can misalign the output blob and corrupt the following mask. Fix the increment to use sizeof(*topo). There is no issue currently, as sizeof(*topo) happens to be equal to sizeof(topo) on 64-bit systems (both evaluate to 8 bytes). Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs") Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patch.msgid.link/20260130043907.465128-2-shuicheng.lin@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2026-02-02drm/xe: use entry_dump callbacks for xe2+ PAT dumpsXin Wang1-51/+16
Move xe2+ PAT entry printing into the entry_dump op so platform specific logic stays localized, simplifying future maintenance. v2: - Do not null xe->pat.ops for VFs. - Skip PAT init and dump on VFs (-EOPNOTSUPP), avoiding NULL ops use. v3: - fixed typo v4: (Matt) - Switch xe2_dump() to use the new ops->entry_dump() vfunc. - Remove xe3p_xpc_dump() and reuse the common xe2_dump() for Xe3p XPC. - This also fixes Xe3p_HPM media PAT dumping by using the proper non-MCR access for the PAT register range (bspec 76445). Cc: Matt Roper <matthew.d.roper@intel.com> Suggested-by: Brian Nguyen <brian3.nguyen@intel.com> Signed-off-by: Xin Wang <x.wang@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patch.msgid.link/20260130175349.2249033-1-x.wang@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2026-02-02drm/xe/guc: Fix kernel-doc warning in GuC scheduler ABI headerChaitanya Kumar Borah1-1/+1
The GuC scheduler ABI header contains a file-level comment that is not intended to document a kernel-doc symbol. Using kernel-doc comment syntax (/** */) triggers kernel-doc warnings. With "-Werror", this causes the build to fail. Convert the comment to a regular block comment. HDRTEST drivers/gpu/drm/xe/abi/guc_scheduler_abi.h Warning: drivers/gpu/drm/xe/abi/guc_scheduler_abi.h:11 This comment starts with '/**', but isn't a kernel-doc comment. Refer to Documentation/doc-guide/kernel-doc.rst * Generic defines required for registration with and submissions to the GuC 1 warnings as errors make[6]: *** [drivers/gpu/drm/xe/Makefile:377: drivers/gpu/drm/xe/abi/guc_scheduler_abi.hdrtest] Error 3 make[5]: *** [scripts/Makefile.build:544: drivers/gpu/drm/xe] Error 2 make[4]: *** [scripts/Makefile.build:544: drivers/gpu/drm] Error 2 make[3]: *** [scripts/Makefile.build:544: drivers/gpu] Error 2 make[2]: *** [scripts/Makefile.build:544: drivers] Error 2 make[1]: *** [/home/kbuild2/kernel/Makefile:2088: .] Error 2 make: *** [Makefile:248: __sub-make] Error 2 v2: - Add Fixes tag (Daniele) Fixes: b0c5cf4f5917 ("drm/gt/guc: extract scheduler-related defines from guc_fwif.h") Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Reviewed-by: Shuicheng Lin <shuicheng.lin@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patch.msgid.link/20260130135210.2659200-1-chaitanya.kumar.borah@intel.com
2026-02-02drm/xe/guc: Fix CFI violation in debugfs access.Daniele Ceraolo Spurio2-3/+5
xe_guc_print_info is void-returning, but the function pointer it is assigned to expects an int-returning function, leading to the following CFI error: [ 206.873690] CFI failure at guc_debugfs_show+0xa1/0xf0 [xe] (target: xe_guc_print_info+0x0/0x370 [xe]; expected type: 0xbe3bc66a) Fix this by updating xe_guc_print_info to return an integer. Fixes: e15826bb3c2c ("drm/xe/guc: Refactor GuC debugfs initialization") Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: George D Sworo <george.d.sworo@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Link: https://patch.msgid.link/20260129182547.32899-2-daniele.ceraolospurio@intel.com
2026-02-02drm/panel-edp: Move FriendlyELEC HD702ERobin Murphy2-25/+26
FriendlyELEC's HD702E module is an eDP panel (in as much as it's some LVDS LCD behind a Chrontel CH7511B eDP bridge), so move its data over to the eDP driver, also resolving the warning about the missing bpc value in the process. The unfortunate combination of HPD not being wired up and the RK3399 eDP controller's behaviour seems to result in the EDID not being readable over DP-AUX without probing the panel first, thus the hard-coded mode is still needed to get things going. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://patch.msgid.link/a00a59dcef3693efb02a8ee942848fbeaeaf05ba.1769191673.git.robin.murphy@arm.com
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