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2026-06-03drm/amd/display: Fix NULL deref and buffer over-read in SDP debugfsHarry Wentland1-0/+5
[Why & How] dp_sdp_message_debugfs_write() dereferences connector->base.state->crtc without checking for NULL. A connector can be connected but not bound to any CRTC (e.g. after hot-plug before the next atomic commit), causing a kernel crash when writing to the sdp_message debugfs node. The function also ignores the user-provided size argument and always passes 36 bytes to copy_from_user(), reading past the user buffer when size < 36. Fix both issues by: - Returning -ENODEV when connector->base.state or state->crtc is NULL - Clamping write_size to min(size, sizeof(data)) Fixes: c7ba3653e977 ("drm/amd/display: Generic SDP message access in amdgpu") Assisted-by: Copilot:claude-opus-4.6 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03drm/amd/display: Avoid DPMS-on for phantom streamIlya Bakoulin1-0/+2
[Why & How] Calling dc_update_planes_and_stream separately for stream and its phantom stream causes a NULL pointer dereference, since the phantom is destroyed on the first call. Skip the call for phantom streams. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03drm/amd/display: Clamp VBIOS HDMI retimer register count to array sizeHarry Wentland1-16/+32
[Why & How] The VBIOS integrated info tables (v1_11 and v2_1) contain HdmiRegNum and Hdmi6GRegNum fields that are used as loop bounds when copying retimer I2C register settings into fixed-size arrays (dp*_ext_hdmi_reg_settings[9] and dp*_ext_hdmi_6g_reg_settings[3]). These u8 fields are not validated before use, so a malformed VBIOS can specify values up to 255, causing an out-of-bounds heap write during driver probe. Clamp each register count to the destination array size using min_t() before the copy loops, in both get_integrated_info_v11() and get_integrated_info_v2_1(). Assisted-by: GitHub Copilot:claude-opus-4.6 Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03drm/amd/display: Change default driver setting for "Force ODM2:1 for eDP" policyOvidiu Bunea1-1/+1
[Why & How] Change the driver setting: force single eDP ODM2:1 disable as default. Still allow user to enable it via debug option. Revert to unblock testing. Reviewed-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03drm/amd/display: Fix out-of-bounds read in dp_get_eq_aux_rd_interval()Harry Wentland1-1/+1
[Why & How] The aux_rd_interval array in struct dc_lttpr_caps is declared with MAX_REPEATER_CNT - 1 (7) elements, indexed 0..6. However, the offset parameter passed to dp_get_eq_aux_rd_interval() can be as large as MAX_REPEATER_CNT (8) when a sink reports 8 LTTPR repeaters via DPCD. This leads to an out-of-bounds read of aux_rd_interval[7] when offset is 8. Fix this by growing aux_rd_interval to MAX_REPEATER_CNT elements to accommodate the full range of valid repeater counts defined by the DP spec. Assisted-by: GitHub Copilot:Claude claude-4-opus Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03drm/amd/display: Add DC_VALIDATE_MODE_AND_PROGRAMMING condition check for force odm2:1Charlene Liu1-2/+4
[Why & How] Need to limit force ODM 2:1 to DC_VALIDATE_MODE_AND_PROGRAMMING only, i.e. not block isCofunc check for topology mapping allowed. Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03drm/amd/display: Check for sharpening case when calculating max vtaps for scalerSamson Tam1-2/+6
[Why & How] - calc_lb_num_partitions has check when scaler is not enabled to use larger LB in calculations for max vtaps based on viewport being 1:1 - however, scaler is forced on when sharpening is enabled, so need to consider this in check - taps is predetermined in spl_get_optimal_number_of_taps prior to calc_lb_num_partitions. Add check for taps not 1 to handle sharpening case Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Samson Tam <Samson.Tam@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03drm/amd/display: Add DRAM table fields to clk_mgr_internalWenjing Liu1-0/+11
[Why] Add GPU-accessible DRAM buffer fields for bulk data transfer from PMFW during clock manager initialization. [How] Add dal_init_table and dal_init_table_addr fields to struct clk_mgr_internal for TABLE_DAL_INIT DRAM transfer. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03drm/amd/display: Add DCN42 PMO init_for_pstate_supportDmytro Laktyushkin5-38/+152
[Why & How] Add pmo_dcn42_init_for_pstate_support mirroring the DCN4 FAMS2 version, but dropping the meta build for scheduling check that is unnecessary and skipping the cofunctionality check. This solves vrr validation issues in multidisplay configs. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03drm/amd/display: Enable gcov coverage for amdgpu_dm KUnit buildsAlex Hung2-0/+9
[Why & How] Add GCOV_PROFILE := y to amdgpu_dm/Makefile under the CONFIG_DRM_AMD_DC_KUNIT_TEST guard so coverage instrumentation is only applied during KUnit builds, not all amdgpu_dm builds. Add coverage config options (CONFIG_GCOV, CONFIG_DEBUG_INFO, CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT, CONFIG_DEBUG_KERNEL) to tests/.kunitconfig so the kunit.py runner enables the kernel coverage configuration automatically. Assisted-by: Copilot:Claude-Sonnet-4.6 Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03drm/amd/display: add missing CSC entries for BT.2020 for DCE IPsLeorize2-2/+18
DCE-based hardware does not have the CSC matrices for BT.2020, which causes the driver to fallback to the GPU built-in matrices. This does not appear to cause any issues for RGB sinks, but causes major color artifacts for YCbCr ones (e.g. black becomes green). This commit adds the missing CSC matrices (taken from DC common) to DCE CSC tables, resolving the issue. Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/3358 Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/5333 Assisted-by: oh-my-pi:GPT-5.5 Signed-off-by: Leorize <leorize+oss@disroot.org> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03drm/amd/display: Enable frame skipping in 0x37BChuntao Tso2-1/+6
[Why & How] Enable frame skipping in 0x37B Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Chuntao Tso <chuntao.tso@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03drm/amd/display: Enable dcn42 pstate pmoDmytro Laktyushkin1-0/+2
[Why & How] Set a flag to enable pstate pmo, we want to always allow pstate support on dcn42 Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03drm/amd/display: Enable DCN42 PMO policyNicholas Kazlauskas8-18/+184
[Why] The MinTTU policy in DML2.1 does not guarantee that we support p-state in blank. This is a delta vs dml2 and earlier revisions as the prefetch mode override has been removed in favor of a more configurable pstate optimizer. [How] The policy has been added in a prior patch, this patch enables it based on pmo flag. Reviewed-by: Dillon Varone <Dillon.Varone@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03drm/amd/display: Update get_pixel_clk_frequency() for DCN4x DCCG DP DTOOvidiu Bunea5-21/+83
[Why & How] DCN4x ASICs have different DCCG logic for programming DP DTO. The current get_pixel_clk_frequency_100hz() function does not account for this. Rename the function to "get_dp_dto_frequency" to more accurately reflect its intended behaviour. Create a new function that correctly calculates the target pixel rate for DCN4.x DCCG design and use it. Reviewed-by: Leo Chen <leo.chen@amd.com> Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03drm/dumb-buffer: Drop buffer-size limits for nowThomas Zimmermann1-7/+0
The size limits break some of the CI tests. So drop them for now. Keep the other overflow tests from commit 5ab62dd3687b ("drm: prevent integer overflows in dumb buffer creation helpers") in place. There is still a pre-existing overflow check for 32-bit type limits in drm_mode_create_dumb() that will catch the really absurd size requests. Drivers that still do not use drm_mode_size_dumb() should be updated. The helper calculates dumb-buffer geometry with overflow checks. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Fixes: 5ab62dd3687b ("drm: prevent integer overflows in dumb buffer creation helpers") Reported-by: Jani Nikula <jani.nikula@linux.intel.com> Closes: https://lore.kernel.org/dri-devel/ddf0233e50044059c85279f928661563ef6a55bf@intel.com/ Cc: Rajat Gupta <rajat.gupta@oss.qualcomm.com> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://patch.msgid.link/20260602112842.252279-1-tzimmermann@suse.de
2026-06-03mm/slab: improve kmem_cache_alloc_bulkChristoph Hellwig2-12/+14
The kmem_cache_alloc_bulk return value is weird. It returns the number of allocated objects, but that must always be 0 or the requested number based on the implementations and the handling in the callers, but that assumption is not actually documented anywhere, which confuses automated review tools. Fix this by returning a bool if the allocation succeeded and adding a kerneldoc comment explaining the API. [rob.clark@oss.qualcomm.com: fixups in msm_iommu_pagetable_prealloc_allocate() ] Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Alexander Lobakin <aleksander.lobakin@intel.com> # skbuff Link: https://patch.msgid.link/20260528093437.2519248-2-hch@lst.de Signed-off-by: Vlastimil Babka (SUSE) <vbabka@kernel.org>
2026-06-03gpu: nova-core: gsp: enable FSP boot pathAlexandre Courbot1-2/+2
Now that all the elements are in place, enable the FSP boot path so Hopper and Blackwell can boot. Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260603-b4-blackwell-v13-9-d9f3a06939e0@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-06-03gpu: nova-core: add non-sec2 unload pathEliot Courtney1-2/+36
For non-sec2 it is only required to wait for GSP falcon to halt. This is because GSP does the main work of unloading on GPUs not using sec2. Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> [ jhubbard: use Result instead of Result<()> in the UnloadBundle impl ] Signed-off-by: John Hubbard <jhubbard@nvidia.com> Link: https://patch.msgid.link/20260603-b4-blackwell-v13-8-d9f3a06939e0@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-06-03gpu: nova-core: Hopper/Blackwell: add GSP lockdown release pollingJohn Hubbard4-2/+115
On Hopper and Blackwell, FSP boots GSP with hardware lockdown enabled. After FSP Chain of Trust completes, the driver must poll for lockdown release before proceeding with GSP initialization. Add the register bit and helper functions needed for this polling. Signed-off-by: John Hubbard <jhubbard@nvidia.com> Link: https://patch.msgid.link/20260603-b4-blackwell-v13-7-d9f3a06939e0@nvidia.com [acourbot: fix `lockdown_released` logic and add explanatory comments.] Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-06-03gpu: nova-core: Hopper/Blackwell: add FSP Chain of Trust bootJohn Hubbard8-13/+310
Build and send the Chain of Trust message to FSP, bundling the DMA-coherent boot parameters that FSP reads at boot time. Signed-off-by: John Hubbard <jhubbard@nvidia.com> Link: https://patch.msgid.link/20260603-b4-blackwell-v13-6-d9f3a06939e0@nvidia.com [acourbot: rename `frts_offset` to `frts_vidmem_offset`.] [acourbot: add note about frts_sysmem_* CoT members.] Co-developed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-06-03gpu: nova-core: Hopper/Blackwell: select FSP Chain of Trust versionJohn Hubbard4-4/+46
The FSP Chain of Trust handshake is versioned: Hopper speaks version 1 and Blackwell speaks version 2. Provide the version through the FSP HAL so the boot message carries the value FSP expects, and so chipsets that do not use FSP need not express a version at all. Signed-off-by: John Hubbard <jhubbard@nvidia.com> Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260603-b4-blackwell-v13-5-d9f3a06939e0@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-06-03gpu: nova-core: Hopper/Blackwell: add FSP send/receive messagingJohn Hubbard2-4/+103
FSP exchanges are request/response: the driver sends an MCTP/NVDM message and must match the reply against the request before acting on it. Add the synchronous send-and-wait path that validates the response transport and message headers and confirms the reply corresponds to the request that was sent. Signed-off-by: John Hubbard <jhubbard@nvidia.com> Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260603-b4-blackwell-v13-4-d9f3a06939e0@nvidia.com [acourbot: make `MessageToFsp` private.] Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-06-03gpu: nova-core: add MCTP/NVDM protocol types for firmware communicationJohn Hubbard2-0/+91
Add the MCTP (Management Component Transport Protocol) and NVDM (NVIDIA Data Model) wire-format types used for communication between the kernel driver and GPU firmware processors. This includes typed MCTP transport headers, NVDM message headers, and NVDM message type identifiers. Both the FSP boot path and the upcoming GSP RPC message queue share this protocol layer. Signed-off-by: John Hubbard <jhubbard@nvidia.com> Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260603-b4-blackwell-v13-3-d9f3a06939e0@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-06-03gpu: nova-core: Hopper/Blackwell: add FSP message infrastructureJohn Hubbard2-3/+99
FSP communication uses a pair of non-circular queues in the FSP falcon's EMEM, one for messages from the driver to FSP and one for replies, with the driver polling for response data. Add the queue registers and the low-level helpers used by the higher-level FSP message layer. Signed-off-by: John Hubbard <jhubbard@nvidia.com> Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260603-b4-blackwell-v13-2-d9f3a06939e0@nvidia.com [acourbot: align register fields names with OpenRM.] [acourbot: represent registers as arrays of 8 instances, as per OpenRM.] Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-06-03gpu: nova-core: Hopper/Blackwell: add FSP falcon EMEM operationsJohn Hubbard2-5/+93
Add external memory (EMEM) read/write operations to the GPU's FSP falcon engine. These operations use Falcon PIO (Programmed I/O) to communicate with the FSP through indirect memory access. Signed-off-by: John Hubbard <jhubbard@nvidia.com> Reviewed-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260603-b4-blackwell-v13-1-d9f3a06939e0@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-06-03drm/v3d: Skip CSD when it has zeroed workgroupsMaíra Canal1-3/+13
A compute shader dispatch encodes its workgroup counts in the CFG0..CFG2 registers. Kicking off a dispatch with a zero count in any of the three dimensions is invalid. First, the hardware will process 0 as 65536, while the user-space driver exposes a maximum of 65535. Over that, a submission with a zeroed workgroup dimension should be a no-op. These zeroed counts can reach the dispatch path through an indirect CSD job, whose workgroup counts are only known once the indirect buffer is read and may legitimately be zero, but such scenario should only result in a no-op. Overwrite the indirect CSD job workgroup counts with the indirect BO ones, even if they are zeroed, and don't submit the job to the hardware when any of the workgroup counts is zero, so the job completes immediately instead of running the shader. Cc: stable@vger.kernel.org Fixes: d223f98f0209 ("drm/v3d: Add support for compute shader dispatch.") Suggested-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Link: https://patch.msgid.link/20260602-v3d-fix-indirect-csd-v4-2-654309e32bc0@igalia.com Signed-off-by: Maíra Canal <mcanal@igalia.com>
2026-06-03drm/v3d: Fix vaddr leak when indirect CSD has zeroed workgroupsMaíra Canal1-1/+2
v3d_rewrite_csd_job_wg_counts_from_indirect() maps both the indirect buffer and the workgroup buffer and is expected to release them before returning. When any of the workgroup counts read from the buffer is zero, the function bailed out early and skipped the cleanup, leaking the vaddr mappings of both BOs. Jump to the cleanup path instead of returning directly, so the mappings are always dropped. Cc: stable@vger.kernel.org Fixes: 18b8413b25b7 ("drm/v3d: Create a CPU job extension for a indirect CSD job") Suggested-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Link: https://patch.msgid.link/20260602-v3d-fix-indirect-csd-v4-1-654309e32bc0@igalia.com Signed-off-by: Maíra Canal <mcanal@igalia.com>
2026-06-03drm/i915/edp: Check supported link rates DPCD readNikita Zhandarovich1-2/+9
intel_edp_set_sink_rates() reads DP_SUPPORTED_LINK_RATES into a local stack array and then parses the array unconditionally. If the read fails, the array contents are not valid and may result in bogus sink link rates being used. Use drm_dp_dpcd_read_data() and clear the sink rate array on failure, so the existing parser falls back to the default sink rate handling. Found by Linux Verification Center (linuxtesting.org) with static analysis tool SVACE. Fixes: 68f357cb7347 ("drm/i915/dp: generate and cache sink rate array for all DP, not just eDP 1.4") Signed-off-by: Nikita Zhandarovich <n.zhandarovich@fintech.ru> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patch.msgid.link/20260529145759.1640646-1-n.zhandarovich@fintech.ru Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2026-06-03drm/print: describe 6th & 9th bit of drm.debugMichał Grzelak1-1/+3
Setting 6th or 9th bit of drm.debug change debug logging. Meanwhile `modinfo drm` does not inform about it at all. Add info to MODULE_PARAM_DESC(debug, ...) about setting 6th and 9th bit basing on DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, ...). Match description of corresponding bits with enum drm_debug_category. Include 9th bit in the example with enabling all possible logging provided at comment at include/drm/drm_print.h. Signed-off-by: Michał Grzelak <michal.grzelak@intel.com> Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patch.msgid.link/20260522135520.1862848-2-michal.grzelak@intel.com
2026-06-03drm/i915: Fix color blob reference handling in intel_plane_stateChaitanya Kumar Borah1-0/+27
Take proper references for hw color blobs (degamma_lut, gamma_lut, ctm, lut_3d) in intel_plane_duplicate_state() and drop them in intel_plane_destroy_state(). v2: - handle blobs in hw state clear Cc: <stable@vger.kernel.org> #v6.19+ Fixes: 3b7476e786c2 ("drm/i915/color: Add framework to program PRE/POST CSC LUT") Fixes: a78f1b6baf4d ("drm/i915/color: Add framework to program CSC") Fixes: 65db7a1f9cf7 ("drm/i915/color: Add 3D LUT to color pipeline") Reviewed-by: Pranay Samala <pranay.samala@intel.com> #v1 Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Link: https://patch.msgid.link/20260601082953.128539-4-chaitanya.kumar.borah@intel.com (cherry picked from commit c6eea1925154b6697fe22b217faab9bb30635e6b) Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>
2026-06-03drm/sched: Add test suite for concurrent job submissionsMarco Pagani1-0/+359
Add a new test suite to simulate concurrent job submissions to the DRM scheduler, as this functionality is not covered by current test suites. The new test suite includes two initial test cases: (i) a test case for parallel job submission and (ii) a test case for interleaved job submission and completion. In the first test case, worker threads concurrently submit jobs to the scheduler, and then the timeline is manually advanced to complete them in bulk. In the second test case, worker threads concurrently submit sequences of jobs of different durations to the mock scheduler using a sliding window to better model real-world workloads. The timeline is advanced automatically by the finishing jobs, interleaving submission with completion. Signed-off-by: Marco Pagani <marco.pagani@linux.dev> Signed-off-by: Philipp Stanner <phasta@kernel.org> Link: https://patch.msgid.link/20260520093350.1036001-1-marco.pagani@linux.dev
2026-06-03thermal/of: Add cooling device ID supportDaniel Lezcano1-2/+3
Introduce an identifier (cdev_id) for cooling devices registered from device tree. This prepares support for a new DT binding where cooling devices are identified by a tuple (device node, ID), instead of relying on child nodes. Existing users are updated to pass a default ID of 0, preserving the current behavior. Future changes will extend the cooling map parsing to match cooling devices based on both the device node and the ID. No functional change intended. Signed-off-by: Daniel Lezcano <daniel.lezcano@oss.qualcomm.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Acked-by: Rafael J. Wysocki (Intel) <rafael@kernel.org> Link: https://patch.msgid.link/20260526140802.1059293-19-daniel.lezcano@oss.qualcomm.com
2026-06-03Merge tag 'amd-drm-next-7.2-2026-05-29' of https://gitlab.freedesktop.org/agd5f/linux into drm-nextDave Airlie80-955/+3307
amd-drm-next-7.2-2026-05-29: amdgpu: - GEM_OP warning fix - GEM_OP locking fix - Userq fixes - DCN 2.1 refclk fix - SI fixes - HMM fixes - Add DC KUNIT tests - UML fixes - Switch to system_dfl_wq - Old DC power state cleanup - RAS fixes amdkfd: - svm_range_set_attr locking fix - CRIU restore fix - KFD debugger fix radeon: - Use struct drm_edid instead of struct edid Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patch.msgid.link/20260529214346.2328355-1-alexander.deucher@amd.com
2026-06-03Merge tag 'drm-intel-gt-next-2026-05-29' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-nextDave Airlie6-23/+101
Cross-subsystem Changes: - Backmerge of drm-next to pull in a commit to revert Driver Changes: - Avoid skipping already signaled fence after reset (Sebastian) - Fix potential UAF in TTM object purge (Janusz) - Fix refcount underflow in intel_engine_park_heartbeat (Sebastian) - Drop check for changed VM in EXECBUF (Joonas) - Revert the "else vma = NULL" patch for being superseded (Joonas) - Selfest improvements (Janusz, Krzysztof) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patch.msgid.link/ahlc1R5bzJvmBLlZ@jlahtine-mobl
2026-06-03Merge tag 'drm-misc-next-2026-05-28' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-nextDave Airlie58-277/+1223
drm-misc-next for v7.2-rc1: UAPI Changes: - amdxdna: Revert read-only user-pointer BO mappings. - panthor: Add eviction and reclaim info to fdinfo. Cross-subsystem Changes: - Convert DMA-buf system and cma heap allocators to module. Core Changes: - Cleanup driver misuses of drm/exec. Driver Changes: - Add LG LP129WT232166, AM-1280800W8TZQW-T00H, NEC NL6448BC33-70C, Riverdi RVT70HSLNWCA0 and RVT101HVLNWC00 panels. - Add support for RZ/T2H SoC to renesas. - Add cursor plane support to verisilicon. - Support DVI outputs in ite-it66121 bridge. - Assorted bugfixes, docbook updates and improvements to ivpu, tegra, host1x, nouveau. - Add DSC quirk for ASUS DC301 USB-C dock. - Use drm client buffer for tegra framebuffer. - Add support for GA100 to nouveau. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patch.msgid.link/ef65f43c-becf-473c-a5cc-203fdfecd491@linux.intel.com
2026-06-03drm/virtio: abort virtqueue wait on device removal to avoid hung taskRyosuke Yasuoka3-2/+37
virtio_gpu_queue_ctrl_sgs() and virtio_gpu_queue_cursor() use wait_event() without any abort condition when waiting for virtqueue space. If the host device stops processing commands, these waits block indefinitely inside a drm_dev_enter/exit() critical section. Since drm_dev_unplug(), which is called in device removal and system shutdown call path, blocks on synchronize_srcu() until all critical sections complete, device removal and system shutdown also hang. Add a vqs_released flag to virtio_gpu_device and include it in the wait_event() condition. Set the flag and wake up both queues in a new virtio_gpu_release_vqs() helper, called before drm_dev_unplug() in both virtio_gpu_remove() and virtio_gpu_shutdown(). When the flag is set, the wait returns immediately and the command is aborted, following the same cleanup path as drm_dev_enter() failure. Signed-off-by: Ryosuke Yasuoka <ryasuoka@redhat.com> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Link: https://patch.msgid.link/20260601-virtio-gpu_wait_event-v3-1-89530517a98a@redhat.com
2026-06-03Merge tag 'drm-intel-next-2026-05-28' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-nextDave Airlie59-856/+1221
Xe related: - Fix Xe oops in suspend/shutdown when display was disabled (Jani) Display in general: - More general refactor towards display separation (Jani) - Preparation for fix Adaptive-Sync SDP for PR with Link ON + Auxless-ALPM (Ankit) - PSR related fixes and improvements (Jouni) - Use polling when irqs are unavailable (Michal) - Split bandwidth params into platform- and display-IP-specific structs (Gustavo) - Revert "drm/i915/backlight: Remove try_vesa_interface" (Suraj) - Casf & scaler refactoring (Michal) - Add support for pipe background color (Maarten) - General clean-ups (Maarten) - Sanitize DP link capability change handling (Imre) - Multiple BW QGV fixes (Ville) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/ahhFE5Co5PdZQKG8@intel.com
2026-06-03Merge tag 'drm-xe-next-2026-05-28' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-nextDave Airlie16-311/+626
Driver Changes: - drm/xe: Move xe_uc_fw_abi.h to abi/ (Michal Wajdeczko) - drm/xe: Restore IDLEDLY regiter on engine reset (Balasubramani Vivekanandan) - drm/xe/pm: Do early initialization in init_early() (Michal Wajdeczko) - drm/xe/pm: Don't access device in init_early() (Michal Wajdeczko) - drm/xe: Separate early xe_device initialization (Michal Wajdeczko) - drm/xe: Move xe->info.devid|revid initialization (Michal Wajdeczko) - drm/xe: Move xe->info.force_execlist initialization (Michal Wajdeczko) - drm/xe: Drop unused param from xe_device_create() (Michal Wajdeczko) - drm/xe: Use raw device ID to find sub-platform descriptor (Michal Wajdeczko) - drm/xe: Assign queue name in time for drm_sched_init (Tvrtko Ursulin) - drm/xe/rtp: Implement a structured parser for rule matching (Gustavo Sousa) - drm/xe/rtp: Fully parse the ruleset (Gustavo Sousa) - drm/xe/rtp: Extract rule_match_item() (Gustavo Sousa) - drm/xe/rtp: Do not break parsing when missing context (Gustavo Sousa) - drm/xe/rtp: Don't short-circuit to false in or-yes case (Gustavo Sousa) - drm/xe/rtp: Drop rule matching cases from rtp_to_sr_cases and rtp_cases (Gustavo Sousa) - drm/xe/rtp: Write kunit test cases specific for rule matching (Gustavo Sousa) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thomas Hellstrom <thomas.hellstrom@linux.intel.com> Link: https://patch.msgid.link/ahg7tgWh8djEngjM@fedora
2026-06-02drm/xe/rtp: Ensure device_oob_was only evaluates correct rulesViolet Monti3-1/+26
This commit builds on the implementation of the GT WA testing, increasing the scope of testing to include the device OOB workaround list. As well as checking for XE_RTP_ENGINE_CLASS(), this test also checks for rules involving XE_RTP_GRAPHICS() and XE_RTP_MEDIA(), as well as their derivatives. This test will raise expectation fails for any workarounds in the device_oob_was list that has an invalid rule type, preventing evaluation or inclusion of rules that could be applied in the wrong context. v6: - No change v5: - No change v4: - No change v3: - Removed "VISIBLE_IF_KUNIT" keyword from xe_wa.h - Heavily reworked rule checking within _dev_oob_test() function for easier understanding and interpreting of errors v2: - Changed xe_rtp_table_dev_oob_test() to follow format of xe_rtp_table_gt_test - Changed device_oob_was generated params to follow format of gt_was Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Signed-off-by: Violet Monti <violet.monti@intel.com> Link: https://patch.msgid.link/20260601200947.2032784-10-violet.monti@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2026-06-02drm/xe/rtp: Ensure oob_was does not evaluate engine type rulesViolet Monti3-1/+18
This commit builds on the implementation of the GT WA testing, increasing the scope of testing to include the OOB workaround list. The added test checks for workarounds with XE_RTP_ENGINE_CLASS() rules and raises an expectationfailure if any are found. Unlike the GT workarounds, there are no flags within this workaround list, so all invalid rules will fail. v6: - No change v5: - No change v4: - No change v3: - Removed VISIBLE_IF_KUNIT keyword from xe_wa.h - Reworked KUNIT_EXPECT_TRUE for easier decoding of errors v2: - Changed xe_rtp_table_oob_test() to follow format of xe_rtp_table_gt_test - Changed oob_was generated params to follow format of gt_was generated params Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Signed-off-by: Violet Monti <violet.monti@intel.com> Link: https://patch.msgid.link/20260601200947.2032784-9-violet.monti@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2026-06-02drm/xe/rtp: Ensure gt_was doesn't evaluate rules with engine typesViolet Monti6-2/+69
It is currently possible for a RTP rule, and subsequently a workaround, to expect contexts that may not be present when the workaround is applied. For example, the workarounds in the engine_was[] in drm/xe/xe_wa.c expect an engine entity to be active. Conversely, the gt_was[] is not depending on an engine entity to implement its workarounds. This kunit test addition checks the gt_was[] workaround list for any workarounds with XEP_RTP_ENGINE_CLASS() rules. If a workaround does have one of these rules, the workaround is then checked for the "FOREACH_ENGINE" flag, which ensures the workaround is implemented properly. The result of this test is an expectation failure if a workaround has an improper XE_RTP_ENGINE_CLASS() rule setup, and aims to prevent future issues of gt_was workarounds being applied without proper contexts. The gt_tunings[] RTP table has the same functional layout and requirements as gt_was[], so it shares the same kunit test function, minimizing excessive code. v6: - No change v5: - Remove unnecessary headers from xe_rtp_table_test.c v4: - No change v3: - Removed "VISIBLE_IF_KUNIT" keyword from xe_wa.h - Added gt_tunings[] for testing - Reworked KUNIT_EXPECT_TRUE() for easier parsing of errors v2: - Moved contents of xe_rtp_tables_test.h to .c and removed file - Renamed macro RTP_KUNIT_ARRAY_PARAM to RTP_TABLE_PARAM - Removed unnecessary functions and iterative components from generated _gen_params functions and implemented usage of table name and WA number as entry name - Condensed xe_rtp_table_gt_test() to use KUNIT_EXPECT_TRUE with no message statement - Removed xe_rtp_table_test_init() and xe_rtp_table_test_exit() as fake device initialization is not necessary Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Signed-off-by: Violet Monti <violet.monti@intel.com> Link: https://patch.msgid.link/20260601200947.2032784-8-violet.monti@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2026-06-02drm/xe/rtp: Add struct types for RTP tablesGustavo Sousa8-159/+156
We currently have a mixture of styles for our RTP tables with respect of how we define the number of entries: * xe_rtp_process_to_sr() expects to receive the number of entries as arguments; * xe_rtp_process() expects the array to have a sentinel at the end of the array; * in xe_rtp_test.c, even though xe_rtp_process_to_sr() does not require a sentinel value, we need to rely on that technique to be able to count xe_rtp_entry_sr entries because simply using ARRAY_SIZE() is not possible. The style used by xe_rtp_process_to_sr() makes it hard to share the tables with other compilation units (e.g. kunit tests), since the number of entries is calculated with ARRAY_SIZE(), which is done at compile time. Since we use the size of the tables to create some bitmasks, using a sentinel style doesn't seem great either. A way to reconcile things into a single style is to have a struct type that would hold the entries array and the number of entries. Since we have xe_rtp_entry and xe_rtp_entry_sr, we would have one type for each. The advantage of the proposed approach is that now we have a nice way to share the tables directly to kunit tests with information about their size. v6: - Removed sentinels that are not needed v5: - Removed added code from conflict resolution issues v4: - Removed conflicts with main branch v3: - No changes v2: - Add compatibility with new xe_rtp_table_sr format for "bad-mcr-reg-forced-to-regular" and "bad-regular-reg-forced-to-mcr" Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> Signed-off-by: Violet Monti <violet.monti@intel.com> Link: https://patch.msgid.link/20260601200947.2032784-7-violet.monti@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2026-06-02rust/drm/gem: Use DeviceContext with GEM objectsLyude Paul4-8/+22
Now that we have the ability to represent the context in which a DRM device is in at compile-time, we can start carrying around this context with GEM object types in order to allow a driver to safely create GEM objects before a DRM device has registered with userspace. Signed-off-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com> Link: https://patch.msgid.link/20260507220044.3204919-4-lyude@redhat.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-06-02drm/bridge: analogix_dp: Convert status check functions to boolDamon Ding3-11/+11
Convert analogix_dp_is_slave_video_stream_clock_on() and analogix_dp_is_video_stream_on() from int to bool return type. This makes the code more readable and aligns with kernel best practices for boolean status checks, while simplifying the callers by removing unnecessary "== 0" comparisons. Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20260521102716.1373519-1-damon.ding@rock-chips.com
2026-06-02drm/rockchip: dw_hdmi: Use resume_early pm ops for system suspendJonas Karlman1-3/+4
rockchip_drm_sys_resume()/drm_mode_config_helper_resume() is called before the resume pm ops of dw-hdmi. This result in an atomic_enable() before dw_hdmi_rockchip_resume()/dw_hdmi_resume() is called. Resume (without changes): - rockchip_drm_sys_resume() - drm_mode_config_helper_resume() - atomic_enable() - dw_hdmi_rockchip_resume() - dw_hdmi_resume() - dw_hdmi_init_hw() Change to use resume_early pm ops for system suspend to ensure pm ops for dw-hdmi is run before rockchip-drm pm ops. Also fix a possible NULL pointer dereference timing issue while at it. Resume (with changes): - dw_hdmi_rockchip_resume_early() - dw_hdmi_resume() - dw_hdmi_init_hw() - rockchip_drm_sys_resume() - drm_mode_config_helper_resume() - atomic_enable() Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Tested-by: Heiko Stuebner <heiko@sntech.de> #rk3328 Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20260518193748.2482823-12-jonas@kwiboo.se
2026-06-02drm/rockchip: dw_hdmi: Propagate bus format to display driverJonas Karlman1-1/+43
The HDMI block is currently hardcoded to expect RGB output from the display controller. However, the VOP in some SoCs are capable of YCbCr output to the HDMI block. Read the negotiated bus format from the bridge state and propagate it to the CRCT state in form of output mode and bus format. Treat the format MEDIA_BUS_FMT_FIXED as RGB888 and reject any unsupported formats. This has no inpact until dw-hdmi bridge is fully converted to a HDMI bridge and also adds support for the "color format" connector property. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Tested-by: Heiko Stuebner <heiko@sntech.de> #rk3328 Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20260518193748.2482823-11-jonas@kwiboo.se
2026-06-02drm/rockchip: dw_hdmi: Configure HDMI PHY in atomic_mode_set()Jonas Karlman1-5/+24
The HDMI helpers negotiated TMDS character rate and output bpc are available from the connector state. Change the encoder helper from mode_set() to atomic_mode_set() so these values can be used to configure the HDMI PHY using phy_configure(). This has no impact until the dw-hdmi bridge is fully converted into a HDMI bridge and HDMI helpers are used to assign hdmi.tmds_char_rate. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Tested-by: Heiko Stuebner <heiko@sntech.de> #rk3328 Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20260518193748.2482823-10-jonas@kwiboo.se
2026-06-02drm/rockchip: dw_hdmi: Set output_port for RK3568/RK3566Jonas Karlman1-0/+1
All in-tree RK3568/RK3566 device trees using HDMI also include the required hdmi-connector node at port@1 since their introduction. Define the output_port for RK3568 so that dw-hdmi bridge driver can pick up the display-connector bridge once the dw-hdmi connector is replaced with a bridge connector in a future change. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Tested-by: Heiko Stuebner <heiko@sntech.de> #rk3328 Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20260518193748.2482823-9-jonas@kwiboo.se
2026-06-02drm/rockchip: dw_hdmi: Clean up whitespaceJonas Karlman1-6/+6
Move the blank line before the RK3328 definitions for readability and make the phy_config table spacing consistent with other tables. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Tested-by: Heiko Stuebner <heiko@sntech.de> #rk3328 Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20260518193748.2482823-8-jonas@kwiboo.se
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