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2026-04-21drm/i915: Extract intel_plane_needs_fence()Ville Syrjälä4-2/+12
Extract the naked DISPLAY_VER<4 checks into a descriptive little helper (intel_plane_needs_fence()). And while at it document the reason why the check is what it is. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260416174448.28264-9-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2026-04-21drm/i915: Introduce pin_params.needs_physicalVille Syrjälä2-1/+3
Add a new flag pin_params.needs_physical to inform the pinning code that the display needs a physical address and not GGTT address. This isn't strictly necessary as the current phys_alignment!=0 check is enough in practice. But theoretically one could have needs_physical==true without any alignment requirements. And having an explicit flag feels a bit less magical. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260416174448.28264-8-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2026-04-21drm/i915: Introduce pin_params.needs_low_addressVille Syrjälä3-1/+6
Add a new flag pin_params.needs_low_address to inform the pinning code that the display needs a low ggtt address. The goal is to eliminate all display specific stuff from the low level pinning code (the direct intel_plane_needs_low_addres()) call in this case). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260416174448.28264-7-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2026-04-21drm/i915: Extract intel_plane_needs_low_address()Ville Syrjälä3-9/+17
Extract the naked "gmch? -> need a low ggtt address" check into a more descriptive helper (intel_plane_needs_low_address()). The goal being to eliminate all display specific stuff from the low level pinning code. The actual implementation still abuses PIN_MAPPABLE to achieve this goal. I'm not entire convinced that this whole thing even needs to exist, and the original issue wasn't just caused by some other bug. But no time to dig into it right now, so let's keep going. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260416174448.28264-6-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2026-04-21drm/i915: Introduce pin_params.needs_cpu_lmem_accessVille Syrjälä3-2/+6
Add a new flag pin_params.neeeds_cpu_lmem_access so that the low level pinning code doesn't need to peek into the display driver's framebuffer structure. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260416174448.28264-5-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2026-04-21drm/i915: Extract intel_fb_needs_cpu_access()Ville Syrjälä4-2/+8
Replace the naked "does the framebuffer have a clear color plane?" checks with a more abstract helper that simply tells us whether we require CPU access to the framebuffer's memory. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260416174448.28264-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2026-04-21drm/i915: Introduce struct intel_fb_pin_paramsVille Syrjälä5-55/+69
We need to pass a lot of information between the display driver and the core driver to get framebuffers mapped into GGTT/DPT correctly. Rather than passing around a swarm of integers and boolean as function arguments, let's collect it all into a structure (struct intel_fb_pin_params). Start by moving the gtt view, alignment, phys_alignment, and vtd_guard there. Going forward additional things need to added as well (mainly various boolean flags). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260416174448.28264-3-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2026-04-21drm/xe/fb: Use the correct gtt view for remapped FBsVille Syrjälä1-1/+1
Use the proper gtt view from the plane state rather than always assuming that it came directly from the FB. This is in the DPT codepath so the view should currently always come from the FB, but in the future we may also want per-plane remapping with DPT. Reviewed-by: Jani Nikula <jani.nikula@intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260416174448.28264-2-ville.syrjala@linux.intel.com
2026-04-20drm/nouveau: fix u32 overflow in pushbuf reloc bounds checkGreg Kroah-Hartman1-1/+1
nouveau_gem_pushbuf_reloc_apply() validates each relocation with if (r->reloc_bo_offset + 4 > nvbo->bo.base.size) but reloc_bo_offset is __u32 (uapi/drm/nouveau_drm.h) and the integer literal 4 promotes to unsigned int, so the addition is performed in 32 bits and wraps before the comparison against the size_t bo size. Cast to u64 so the addition happens in 64-bit arithmetic. Cc: Lyude Paul <lyude@redhat.com> Cc: Danilo Krummrich <dakr@kernel.org> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: David Airlie <airlied@gmail.com> Cc: Simona Vetter <simona@ffwll.ch> Reported-by: Anthropic Cc: stable <stable@kernel.org> Assisted-by: gkh_clanker_t1000 Fixes: a1606a9596e5 ("drm/nouveau: new gem pushbuf interface, bump to 0.0.16") Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> [ Add Fixes: tag. - Danilo ] Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-04-20Merge tag 'platform-drivers-x86-v7.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86Linus Torvalds4-8/+7
Pull x86 platform driver updates from Ilpo Järvinen: "asus-wmi: - Retain battery charge threshold during boot which avoids unsolicited change to 100%. Return -ENODATA when the limit is not yet known - Improve screenpad power/brightness handling consistency - Fix screenpad brightness range barco-p50-gpio: - Normalize gpio_get return values bitland-mifs-wmi: - Add driver for Bitland laptops (supports platform profile, hwmon, kbd backlight, gpu mode, hotkeys, and fan boost) dell_rbu: - Fix using uninitialized value in sysfs write function dell-wmi-sysman: - Respect destination length when constructing enum strings hp-wmi: - Propagate fan setting apply failures and log an error - Fix sysfs write vs work handler cancel_delayed_work_sync() deadlock - Correct keepalive schedule_delayed_work() to mod_delayed_work() - Fix u8 underflows in GPU delta calculation - Use mutex to protect fan pwm/mode - Ignore kbd backlight and FnLock key events that are handled by FW - Fix fan table parsing (use correct field) - Add support for Omen 14-fb0xxx, 16-n0xxx, 16-wf1xxx, and Omen MAX 16-ak0xxxx input: trackpoint & thinkpad_acpi: - Enable doubletap by default and add sysfs enable/disable int3472: - Add support for GPIO type 0x02 (IR flood LED) intel-speed-select: (updated to v1.26) - Avoid using current base frequency as maximum - Fix CPU extended family ID decoding - Fix exit code - Improve error reporting intel/vsec: - Refactor to support ACPI-enumerated PMT endpoints. pcengines-apuv2: - Attach software node to the gpiochip uniwill: - Refactor hwmon to smaller parts to accomodate HW diversity - Support USB-C power/performance priority switch through sysfs - Add another XMG Fusion 15 (L19) DMI vendor - Enable fine-grained features to device lineup mapping wmi: - Perform output size check within WMI core to allow simpler WMI drivers misc: - acpi_driver -> platform driver conversions (a large number of changes from Rafael J. Wysocki) - cleanups / refactoring / improvements" * tag 'platform-drivers-x86-v7.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: (106 commits) platform/x86: hp-wmi: Add support for Omen 16-wf1xxx (8C77) platform/x86: hp-wmi: Add support for Omen 16-n0xxx (8A44) platform/x86: hp-wmi: Add support for OMEN MAX 16-ak0xxx (8D87) platform/x86: hp-wmi: fix fan table parsing platform/x86: hp-wmi: add Omen 14-fb0xxx (board 8C58) support platform/wmi: Replace .no_notify_data with .min_event_size platform/wmi: Extend wmidev_query_block() to reject undersized data platform/wmi: Extend wmidev_invoke_method() to reject undersized data platform/wmi: Prepare to reject undersized unmarshalling results platform/wmi: Convert drivers to use wmidev_invoke_procedure() platform/wmi: Add wmidev_invoke_procedure() platform/x86: int3472: Add support for GPIO type 0x02 (IR flood LED) platform/x86: int3472: Parameterize LED con_id in registration platform/x86: int3472: Rename pled to led in LED registration code platform/x86: int3472: Use local variable for LED struct access platform/x86: thinkpad_acpi: remove obsolete TODO comment platform/x86: dell-wmi-sysman: bound enumeration string aggregation platform/x86: hp-wmi: Ignore backlight and FnLock events platform/x86: uniwill-laptop: Fix signedness bug platform/x86: dell_rbu: avoid uninit value usage in packet_size_write() ...
2026-04-20drm/i915/psr: Init variable to avoid early exit from et alignment loopJouni Högander1-1/+1
Uninitialized boolean variable may cause unwanted exit from et alignment loop. Fix this by initializing it as false. Fixes: 1be2fca84f52 ("drm/i915/psr: Repeat Selective Update area alignment") Cc: <stable@vger.kernel.org> # v6.9+ Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Nemesa Garg <nemesa.garg@intel.com> Reported-by: Dan Carpenter <error27@gmail.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patch.msgid.link/20260413112345.88853-1-jouni.hogander@intel.com (cherry picked from commit 289678a90b8cf81e3514c9d6c667235cd39c7acf) Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>
2026-04-20drm/mgag200: Enable DRM_FORMAT_XRGB1555 on the primary planeThomas Zimmermann2-0/+9
The driver already sets the format for the depth value in the XMULCTRL register. Add the format to the other switch statements, set the helpers for gamma correction and export the XRGB1555 in the primary plane's format array. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patch.msgid.link/20260415152625.101710-7-tzimmermann@suse.de
2026-04-20drm/mgag200: Enable DRM_FORMAT_C8 on the primary planeThomas Zimmermann1-0/+7
The driver already contains all format setting for DRM_FORMAT_C8. Set the gamma-correction helpers and add the format to the array of plane formats. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patch.msgid.link/20260415152625.101710-6-tzimmermann@suse.de
2026-04-20drm/mgag200: g200se: Set hiprilvl from DRM formatThomas Zimmermann1-3/+9
Replace the deprecated cpp field from struct drm_format_info with the format's 4CC code when setting the hiprilvl field in CRTCEXT6. Using a bpp of 32 for RGB888 is a bit dubious, but we keep it for now to avoid changing behavior. Otherwise, bpp could also be retrieved by calling drm_format_info_bpp(). Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patch.msgid.link/20260415152625.101710-5-tzimmermann@suse.de
2026-04-20drm/mgag200: Simplify offset calculationThomas Zimmermann1-27/+1
The offset value sets the distance in bytes between two consecutive scanlines. Reduce the calculation to the minimum. According to the Matrox programming manual, Sec 4.6.5, the offset is the scanline pitch in bits divided by 128. The field pitches[0] in struct drm_framebuffer stores the scanline pitch in bytes, so we have to divide by 16 only. Reducing the existing bpp-shift look-up and offset calculations also returns exactly this for all formats. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Co-developed-by: Jocelyn Falempe <jfalempe@redhat.com> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patch.msgid.link/20260415152625.101710-4-tzimmermann@suse.de
2026-04-20drm/mgag200: Set scale from DRM formatThomas Zimmermann2-13/+18
Replace the deprecated cpp value from struct drm_format_info with the format's 4CC code when setting the scale value in CRTCEXT3. While at it, remove the scale variable and add a mask constant. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patch.msgid.link/20260415152625.101710-3-tzimmermann@suse.de
2026-04-20drm/mgag200: Set xmulctrl from DRM formatThomas Zimmermann1-15/+11
Replace the deprecated cpp value from struct drm_format_info with the format's 4CC code when setting the depth value in the XMULCTRL register. Split the 16-bit case into XRGB1555 and RGB565. The default branch cannot be taken, so remove it. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patch.msgid.link/20260415152625.101710-2-tzimmermann@suse.de
2026-04-20drm/ast: Support DRM_FORMAT_XRGB1555 on the primary planeThomas Zimmermann2-2/+14
Export DRM_FORMAT_XRGB1555 in the primary plane's format array and handle the format in the color-format updates. With this, ast is now feature complete wrt. color-format support. Also update the comments in the gamma-LUT code to reflect the ast manual's terminology. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patch.msgid.link/20260414070522.33943-5-tzimmermann@suse.de
2026-04-20drm/ast: Replace references to struct drm_format_info.cppThomas Zimmermann2-43/+77
Replace all uses of struct drm_format_info.cpp with the corresponding 4CC constant. Color-mode selection uses switch statements that branch by cpp in several places. While at it, also name the involved variables according to register names and replace magic values with constants. Replace the use of *ModeIndex constants in ast_set_vbios_color_reg() with correct register constants. The former are array indices and do not belong into registers. In ast_set_color_reg(), vgacra0 is independent from the color format, so move it out from the switch statements. There is also a flag for gamma correction in vgacra8, which currently ast_set_color_reg() handles as part of the primary plane. The gamma LUT and its programming is located in the CRTC. A future update should consolidate gamma correction in the primary plane and implement the functionality with DRM's colorop helpers. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patch.msgid.link/20260414070522.33943-4-tzimmermann@suse.de
2026-04-20drm/ast: Remove traces of DRM_FORMAT_RGB888 handlingThomas Zimmermann1-2/+0
There's some incomplete handling for DRM_FORMAT_RGB888 in the mode- setting code. It was added by ast's original commit, which imported the code from the user-space Xorg driver. But the hardware doesn't support 24-bit pixel sizes. Hence remove the traces of RGB888 from ast. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patch.msgid.link/20260414070522.33943-3-tzimmermann@suse.de
2026-04-20drm/ast: Add constant for VGACR91Thomas Zimmermann2-2/+3
Register VGACR91 receives a password that enables the new mode-info header in other registers. Replace the password's magic value with a constant. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://patch.msgid.link/20260414070522.33943-2-tzimmermann@suse.de
2026-04-19drm/v3d: Reject empty multisync extension to prevent infinite loopAshutosh Desai1-0/+5
v3d_get_extensions() walks a userspace-provided singly-linked list of ioctl extensions without any bound on the chain length. A local user can craft a self-referential extension (ext->next == &ext) with zero in_sync_count and out_sync_count, which bypasses the existing duplicate- extension guard: if (se->in_sync_count || se->out_sync_count) return -EINVAL; The guard never fires because v3d_get_multisync_post_deps() returns immediately when count is zero, leaving both fields at zero on every iteration. The result is an infinite loop in kernel context, blocking the calling thread and pegging a CPU core indefinitely. Fix this by rejecting a multisync extension where both in_sync_count and out_sync_count are zero in v3d_get_multisync_submit_deps(). An empty multisync carries no synchronization information and serves no useful purpose, so returning -EINVAL for such an extension is the correct defense against this attack vector. Fixes: e4165ae8304e ("drm/v3d: add multiple syncobjs support") Cc: stable@vger.kernel.org Signed-off-by: Ashutosh Desai <ashutoshdesai993@gmail.com> Link: https://patch.msgid.link/20260415050000.3816128-1-ashutoshdesai993@gmail.com Signed-off-by: Maíra Canal <mcanal@igalia.com>
2026-04-18drm/bridge: waveshare-dsi: support DSI LCD kits with LVDS panelsDmitry Baryshkov1-2/+3
Several Waveshare DSI LCD kits use LVDS panels and the ICN6202 DSI2LVDS bridge. Support that setup by handling waveshare,dsi2lvds compatible. The only difference with the existing waveshare,dsi2dpi is the bridge's output type (LVDS vs DPI). Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260412-ws-lcd-v3-2-db22c2631828@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-04-18drm/panel: add driver for Waveshare 8.8" DSI TOUCH-A panelDmitry Baryshkov3-0/+238
Add driver for the panel found on Waveshare 8.8" DSI TOUCH-A kit. It uses ota7290b IC as a controller. Reviewed-by: Linus Walleij <linusw@kernel.org> Link: https://patch.msgid.link/20260413-waveshare-dsi-touch-v3-19-3aeb53022c32@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-04-18drm/panel: add devm_drm_panel_add() helperDmitry Baryshkov1-0/+23
Add devm_drm_panel_add(), devres-managed version of drm_panel_add(). It's not uncommon for the panel drivers to use devres functions for most of the resources. Provide corresponding replacement for drm_panel_add(). Reviewed-by: Linus Walleij <linusw@kernel.org> Link: https://patch.msgid.link/20260413-waveshare-dsi-touch-v3-18-3aeb53022c32@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-04-18drm/panel: jadard-jd9365da-h3: support Waveshare 720p DSI panelsDmitry Baryshkov1-0/+312
Add configuration for Waveshare 9.0" and 10.1" 720p DSI panels using JD9365 controller. Tested-by: Riccardo Mereu <r.mereu@arduino.cc> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260413-waveshare-dsi-touch-v3-16-3aeb53022c32@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-04-18drm/panel: jadard-jd9365da-h3: support Waveshare WXGA DSI panelsDmitry Baryshkov1-0/+568
Add configuration for several Waveshare 8.0" and 10.1" WXGA DSI panels using JD9365 controller Tested-by: Riccardo Mereu <r.mereu@arduino.cc> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260413-waveshare-dsi-touch-v3-15-3aeb53022c32@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-04-18drm/panel: jadard-jd9365da-h3: support Waveshare round DSI panelsDmitry Baryshkov1-0/+476
Add configuration for Waveshare 3.4" and 4.0" round DSI panels using JD9365 controller. Tested-by: Riccardo Mereu <r.mereu@arduino.cc> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260413-waveshare-dsi-touch-v3-14-3aeb53022c32@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-04-18drm/panel: jadard-jd9365da-h3: set prepare_prev_firstDmitry Baryshkov1-0/+2
Sending DSI commands from the prepare() callback requires DSI link to be up at that point. For DSI hosts is guaranteed only if the panel driver sets the .prepare_prev_first flag. Set it to let these panels work with the DSI hosts which don't power on the link in their .mode_set callback. Reviewed-by: Linus Walleij <linusw@kernel.org> Tested-by: Riccardo Mereu <r.mereu@arduino.cc> Link: https://patch.msgid.link/20260413-waveshare-dsi-touch-v3-13-3aeb53022c32@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-04-18drm/panel: jadard-jd9365da-h3: support variable DSI configurationDmitry Baryshkov1-9/+37
Several panels support attachment either using 4 DSI lanes or just 2. In some cases, this requires a different panel mode to fulfill clock requirements. Extend the driver to handle such cases by letting the panel description to omit lanes specification and parsing number of lanes from the DT. Reviewed-by: Linus Walleij <linusw@kernel.org> Tested-by: Riccardo Mereu <r.mereu@arduino.cc> Link: https://patch.msgid.link/20260413-waveshare-dsi-touch-v3-12-3aeb53022c32@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-04-18drm/panel: jadard-jd9365da-h3: use drm_connector_helper_get_modes_fixedDmitry Baryshkov2-17/+3
Use existing helper instead of manually coding it. Reviewed-by: Linus Walleij <linusw@kernel.org> Link: https://patch.msgid.link/20260413-waveshare-dsi-touch-v3-11-3aeb53022c32@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-04-18drm/panel: himax-hx8394: support Waveshare DSI panelsDmitry Baryshkov1-0/+244
Enable support for Waveshare 5.0" and 5.5" DSI TOUCH-A panels. Reviewed-by: Linus Walleij <linusw@kernel.org> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patch.msgid.link/20260413-waveshare-dsi-touch-v3-10-3aeb53022c32@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-04-18drm/panel: himax-hx8394: simplify hx8394_enable()Dmitry Baryshkov1-27/+14
Simplify hx8394_enable() function by using hx8394_disable() instead of open-coding it and mipi_dsi_msleep() instead of manual checks. Reviewed-by: Linus Walleij <linusw@kernel.org> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patch.msgid.link/20260413-waveshare-dsi-touch-v3-9-3aeb53022c32@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-04-18drm/panel: himax-hx8394: set prepare_prev_firstDmitry Baryshkov1-0/+2
Sending DSI commands from the prepare() callback requires DSI link to be up at that point. For DSI hosts is guaranteed only if the panel driver sets the .prepare_prev_first flag. Set it to let these panels work with the DSI hosts which don't power on the link in their .mode_set callback. Reviewed-by: Linus Walleij <linusw@kernel.org> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patch.msgid.link/20260413-waveshare-dsi-touch-v3-8-3aeb53022c32@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-04-18drm/panel: himax-hx83102: support Waveshare 12.3" DSI panelDmitry Baryshkov1-2/+142
Add support for the Waveshare 12.3" DSI TOUCH-A panel. According to the vendor driver, it uses different mode_flags, so let the panel descriptions override driver-wide defaults. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260413-waveshare-dsi-touch-v3-7-3aeb53022c32@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-04-18drm/of: add helper to count data-lanes on a remote endpointDmitry Baryshkov1-0/+34
If the DSI panel supports versatile lanes configuration, its driver might require determining the number of DSI data lanes, which is usually specified on the DSI host side of the OF graph. Add new helper as a pair to drm_of_get_data_lanes_count_ep() that lets callers determine number of data-lanes on the remote side of the OF graph. Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patch.msgid.link/20260413-waveshare-dsi-touch-v3-6-3aeb53022c32@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-04-17drm/radeon: fix memory leak in radeon_ring_restore() on lock failureYuho Choi1-1/+3
radeon_ring_restore() takes ownership of the data buffer allocated by radeon_ring_backup(). The caller (radeon_gpu_reset()) only frees it in the non-restore branch; in the restore branch it relies on radeon_ring_restore() to free it. If radeon_ring_lock() fails, the function returned early without calling kvfree(data), leaking the ring backup buffer on every GPU reset that fails at the lock stage. During repeated GPU resets this causes cumulative kernel memory exhaustion. Free data before returning the error. Fixes: 55d7c22192be ("drm/radeon: implement ring saving on reset v4") Signed-off-by: Yuho Choi <dbgh9129@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-04-17drm/radeon: fix integer overflow in radeon_align_pitch()Werner Kasselman1-2/+11
radeon_align_pitch() has the same kind of overflow issue as the old amdgpu helper: both the alignment round-up add and the final 'aligned * cpp' calculation can overflow signed int. If that wraps, radeon_mode_dumb_create() can end up returning an invalid pitch or creating a zero-sized dumb buffer. Fix this by using check_add_overflow() for the alignment round-up and check_mul_overflow() for the final pitch calculation, returning 0 on overflow. Also reject zero pitch and size in radeon_mode_dumb_create(). Found via AST-based call-graph analysis using sqry. Fixes: ff72145badb8 ("drm: dumb scanout create/mmap for intel/radeon (v3)") Signed-off-by: Werner Kasselman <werner@verivus.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-04-17drm/amd/display: Promote DC to 3.2.379Taimur Hassan1-1/+1
This version brings along the following updates: - Add allow_clock_gating to dcn42 dccg. - Bypass post csc for additional color spaces in dcn42. - Remove unused dml2_project. - Unset Replay desync error verification by default. - Align HWSS fast commit path with legacy path. - Fix implicit narrowing conversion warnings. - Fix double free. - Introduce power module on Linux. - Add power module on Linux. - Fix fpu guard warning. - Add Replay/PSR active check in link loss status check. - Remove SYMCLK F and G values from link encoder and MANUAL_FLOW_CONTROL from optc. - Add minimum vfp requirement. - Fix narrowing boundaries and eDP parser assignment. - Fix dml2_0 narrowing boundaries. - Add README.md file to DML2_0 repository. - Fix DPMS using partially updated pipe context. - Move dml2_destroy to non-FPU compilation unit. Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Acked-by: Tom Chung <ChiaHsuan.Chung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-04-17drm/amd/display: Fix DPMS using partially updated pipe contextDominik Kaszewski1-7/+14
[Why & How] DPMS functions should not use partially updated pipe context passed as argument of commit_planes_do_stream_update, and instead use the one in current_state, which is guaranteed to be the most recently programmed HW config. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Dominik Kaszewski <dominik.kaszewski@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-04-17drm/amd/display: Add README.md file to DML2_0 repositorySamson Tam1-0/+31
[Why/How] Add README.md file to repository Use it to categorize directories for tracking purposes Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Samson Tam <samson.tam@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-04-17drm/amd/display: Fix dml2_0 narrowing boundariesGaghik Khachatrian8-97/+97
[Why] drm/amd/display dml2_0 code had implicit narrowing conversions reported by a warning in timing, watermark, and translation paths. [How] Apply explicit boundary casts for intentional narrowing, preserve wider intermediate math, and use wider timing intermediates where required for safe range handling. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-04-17drm/amd/display: Fix narrowing boundaries and eDP parser assignmentGaghik Khachatrian24-60/+64
[Why] drm/amd/display had implicit integer narrowing at protocol/storage boundaries and an incomplete eDP assignment in integrated info parsing. [How] Apply explicit boundary casts for intentional narrowing, keep intermediate math in wider types, and restore explicit eDP field mapping in v2.2 parser. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-04-17drm/amd/display: Add minimum vfp requirementDillon Varone1-2/+5
[WHY&HOW] Vertical front porch (vfp) must be greater than 1, and must be patched if it isn't. This must be done pre-DML so the DLG programming remains consistent with the OTG programming. Reviewed-by: Austin Zheng <austin.zheng@amd.com> Signed-off-by: Dillon Varone <Dillon.Varone@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-04-17drm/amd/display: Remove SYMCLK F and G values from link encoder and MANUAL_FLOW_CONTROL from optcAndrew Lichmanov3-4/+0
[WHY] Definitions were removed by HW from new headers. Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Andrew Lichmanov <Andrew.Lichmanov@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-04-17drm/amd/display: Add Replay/PSR active check in link loss status checkAllen Li1-20/+31
[Why&How] To avoid unnecessary link retraining when the panel is in Replay/PSR mode, we need to check if it's in active state and ESD information before we decide to retrain the link. Reviewed-by: ChunTao Tso <chuntao.tso@amd.com> Signed-off-by: Allen Li <allen.li@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-04-17drm/amd/display: Add power module on LinuxRay Wu12-440/+561
[Why & How] Refactors dm to utilize the power module for managing replay, PSR, and backlight control functionalities. Key changes: - Introduced replay / PSR events to enable / disable replay / PSR. - Implemented replay rate control and power option - Refactored backlight control by using the power module. - Enhanced handling of VRR within replay and PSR logic. Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-04-17drm/amd/display: Introduce power module on LinuxRay Wu6-1/+3466
[Why] Other OS supported by DC uses the power module to manage panel power features such as backlight and self-refresh. It contains enhancements on top what amdgpu_dm is doing today that can benefit power. [How] Introduce the power module. It's currently not being used anywhere, a future change will incorporate it into amdgpu_dm. Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-04-17drm/amd/display: Fix double freeIlya Bakoulin1-2/+8
[Why/How] Reset pointer/address to avoid double free. Reviewed-by: Sridevi Arvindekar <sridevi.arvindekar@amd.com> Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-04-17drm/amd/display: Fix implicit narrowing conversion warningsGaghik Khachatrian107-704/+733
[Why] Multiple display source files contain implicit narrowing conversions when assigning wider integer types (int, uint32_t) to narrower fields (uint8_t, uint16_t) at hardware register, protocol, and storage boundaries. These conversions are intentional but undocumented, and accompanying runtime assertions add noise without providing compile-time safety. [How] Add explicit casts at all intentional narrowing boundaries across display source files. Use narrower loop variable types where loop bounds guarantee safe range. Remove runtime assertions paired with narrowing casts, inline single-use intermediate variables, and revert block scopes and braces introduced solely to contain those assertions. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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