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2026-02-25drm/i915/dp_tunnel: Split update_tunnel_state()Imre Deak1-7/+34
Split update_tunnel_state() into two helpers: one that updates the tunnel state, and another that detects whether the tunnel bandwidth has changed. This prepares for a follow-up change that needs to compare the current bandwidth against the value from before the DP tunnel was detected and bandwidth allocation mode was enabled. While at it, document the return value of update_tunnel_state(). Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260219182823.926702-4-imre.deak@intel.com
2026-02-25drm/i915/dp_tunnel: Simplify detection of link BW changeImre Deak1-13/+5
update_tunnel_state() checks whether a tunnel state change (e.g. available tunnel bandwidth) affects the list of valid modes for the sink connected through the tunnel. If so, its caller sends a hotplug event so userspace can re-enumerate the modes. A change in tunnel bandwidth does not affect the mode list if the bandwidth was above the sink's DPRX bandwidth both before and after the update, since in that case the effective bandwidth remains limited by the DPRX. As get_current_link_bw() via intel_dp_max_link_data_rate() already returns bandwidth values clamped to the DPRX limit, the condition for detecting a mode list change can be simplified to: old_bw != new_bw Remove the explicit checks for whether the bandwidth was below the maximum DPRX bandwidth before and after the update, and rely on the clamped bandwidth values instead. Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260219182823.926702-3-imre.deak@intel.com
2026-02-25drm/i915/dp_tunnel: Don't update tunnel state during system resumeImre Deak1-5/+6
During system resume, restoring the pre-suspend display state must not fail. This requires preserving the sink capabilities from before suspend, including the available link bandwidth. If these capabilities are not preserved, the restore modeset may fail, either due to a missing sink capability or insufficient link bandwidth for the restored mode. When the sink is connected through a DP tunnel, prevent such capability changes by skipping tunnel state updates during resume. This also avoids updating the sink state via the tunnel while it is being resumed. Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260219182823.926702-2-imre.deak@intel.com
2026-02-25drm/i915/fbdev: print info about stolen memory preference for fbdevVinod Govindapillai1-0/+3
If stolen memory cannot be allocated for the fbdev because of the preference for fbc, have an info about that in the log. v2: log text changed Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Acked-by: Mika Kahola <mika.kahola@intel.com> Link: https://patch.msgid.link/20260220170908.201422-7-vinod.govindapillai@intel.com
2026-02-25drm/xe/fbdev: print info about stolen memory preference for fbdevVinod Govindapillai2-1/+5
If stolen memory cannot be allocated for the fbdev and initial plane bo because of the preference for fbc, have an info about that in the log. v2: log text changed Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Acked-by: Mika Kahola <mika.kahola@intel.com> Link: https://patch.msgid.link/20260220170908.201422-6-vinod.govindapillai@intel.com
2026-02-25drm/xe/fbdev: Extract intel_fbdev_fb_prefer_stolen()Ville Syrjälä2-10/+26
Pull the "should we keep the bios fb in stolen?" logic into into a helper function, same as was done for i915. Gives us a single place where to tweak the heuristics. v2: changes related to rebase and consolidated other conditions for the stolen preference into this single function (Vinod) v3: avoid including intel_display_core.h (Jani Nikula) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Acked-by: Mika Kahola <mika.kahola@intel.com> Link: https://patch.msgid.link/20260220170908.201422-5-vinod.govindapillai@intel.com
2026-02-25drm/i915/fbdev: Extract intel_fbdev_fb_prefer_stolen()Ville Syrjälä3-9/+20
Consolidate the "should we allocate fbdev fb in stolen?" check into a helper function. Makes it easier to change the heuristics without having to change so many places. v2: rebase related changes and consolidate all the prefer stolen conditions into a single function (Vinod) v3: avoid including intel_display_core.h (Jani) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Acked-by: Mika Kahola <mika.kahola@intel.com> Link: https://patch.msgid.link/20260220170908.201422-4-vinod.govindapillai@intel.com
2026-02-25drm/i915/display: remove the usage of dev_privVinod Govindapillai1-6/+6
Remove the remaining usage of dev_priv in intel_fbdev_fb.c and use i915 instead. Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://patch.msgid.link/20260220170908.201422-3-vinod.govindapillai@intel.com
2026-02-25drm/xe/fbdev: Fix BIOS FB vs. stolen size checkVille Syrjälä1-1/+1
Looks like stolen->size is in bytes, not pages. Remove the bogus PAGE_SHIFT stuff. Also for some random reason xe rejects the FB if it takes up exactly half of stolen, whereas i915 allows it to be used in that case. Adjust xe to follow the i915 rule for consistency. v2: rebase related updates Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Acked-by: Mika Kahola <mika.kahola@intel.com> Link: https://patch.msgid.link/20260220170908.201422-2-vinod.govindapillai@intel.com
2026-02-25Merge drm/drm-next into drm-intel-nextJani Nikula1917-23708/+148367
Sync with v7.0-rc1 which contains a few treewide changes affecting i915. Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2026-02-25drm/client: Do not destroy NULL modesJonathan Cavitt1-1/+2
'modes' in drm_client_modeset_probe may fail to kcalloc. If this occurs, we jump to 'out', calling modes_destroy on it, which dereferences it. This may result in a NULL pointer dereference in the error case. Prevent that. Fixes: 3039cc0c0653 ("drm/client: Make copies of modes") Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260224221227.69126-2-jonathan.cavitt@intel.com
2026-02-25drm: atmel-hlcdc: add LCD controller layer definition for sama7d65Ryan Wanner1-0/+81
Add the LCD controller layer definition and atmel_hlcdc_of_match entry for sama7d65. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://patch.msgid.link/20251218040521.463937-3-manikandan.m@microchip.com Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
2026-02-25drm/bridge: imx8qxp-pixel-link: get/put the next bridgeLuca Ceresoli1-14/+13
This driver obtains a bridge pointer from of_drm_find_bridge() in the probe function and stores it until driver removal. of_drm_find_bridge() is deprecated, so move to of_drm_find_and_get_bridge() for the bridge to be refcounted and use bridge->next_bridge to put the reference on deallocation. To keep the code as simple and reliable as possible remove the intermediate next_bridge and selected_bridge variables. Get/put operations on the remaining pointer is pl->bridge.next_bridge, which is tied to the struct imx8qxp_pixel_link lifetime, are: - get reference when assigned (by of_drm_find_and_get_bridge()) - put reference before reassignment if reassignment happens - put reference when the struct imx8qxp_pixel_link embedding the struct drm_bridge is destroyed (struct drm_bridge::next_bridge) Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com> Acked-by: Liu Ying <victor.liu@nxp.com> Signed-off-by: Liu Ying <victor.liu@nxp.com> Link: https://lore.kernel.org/r/20260211-drm-bridge-alloc-getput-drm_of_find_bridge-v6-1-651ddfd13bdb@bootlin.com
2026-02-25gpu: nova-core: use core library's CStr instead of kernel oneAlexandre Courbot2-2/+2
The kernel's own CStr type has been replaced by the one in the core library, and is now an alias to the latter. Change our imports to directly reference the actual type. Reviewed-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Gary Guo <gary@garyguo.net> Reviewed-by: Danilo Krummrich <dakr@kernel.org> Link: https://patch.msgid.link/20260217-nova-misc-v3-7-b4e2d45eafbc@nvidia.com [acourbot@nvidia.com: remove unneeded imports reorganization in firmware/gsp.rs] Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: gsp: derive Zeroable for GspStaticConfigInfoAlexandre Courbot1-4/+1
We can now derive `Zeroable` on tuple structs, so do this instead of providing our own implementation. Reviewed-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Danilo Krummrich <dakr@kernel.org> Link: https://patch.msgid.link/20260217-nova-misc-v3-6-b4e2d45eafbc@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: gsp: derive `Debug` on more sequencer typesAlexandre Courbot2-5/+6
Being able to print these is useful when debugging the sequencer. Reviewed-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Gary Guo <gary@garyguo.net> Reviewed-by: Danilo Krummrich <dakr@kernel.org> Link: https://patch.msgid.link/20260217-nova-misc-v3-5-b4e2d45eafbc@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: gsp: remove unneeded sequencer traitAlexandre Courbot1-11/+6
The `GspSeqCmdRunner` trait is never used as we never call the `run` methods from generic code. Remove it. Reviewed-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Gary Guo <gary@garyguo.net> Reviewed-by: Danilo Krummrich <dakr@kernel.org> Link: https://patch.msgid.link/20260217-nova-misc-v3-4-b4e2d45eafbc@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: gsp: simplify sequencer opcode parsingAlexandre Courbot1-35/+5
The opcodes are already the right type in the C union, so we can use them directly instead of converting them to a byte stream and back again using `FromBytes`. Reviewed-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Gary Guo <gary@garyguo.net> Reviewed-by: Danilo Krummrich <dakr@kernel.org> Link: https://patch.msgid.link/20260217-nova-misc-v3-3-b4e2d45eafbc@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: gsp: remove unnecessary Display implsAlexandre Courbot2-55/+1
We only ever display these in debug context, for which the automatically derived `Debug` impls work just fine - so use them and remove these boilerplate-looking implementations. Reviewed-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Alistair Popple <apopple@nvidia.com> Reviewed-by: Gary Guo <gary@garyguo.net> Reviewed-by: Danilo Krummrich <dakr@kernel.org> Link: https://patch.msgid.link/20260217-nova-misc-v3-2-b4e2d45eafbc@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: gsp: warn if data remains after processing a messageAlexandre Courbot1-1/+11
Not processing the whole data from a received message is a strong indicator of a bug - emit a warning when such cases are detected. Reviewed-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Danilo Krummrich <dakr@kernel.org> Link: https://patch.msgid.link/20260217-nova-misc-v3-1-b4e2d45eafbc@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: gsp: fix improper indexing in driver_read_areaEliot Courtney1-7/+12
The current code indexes into `after_rx` using `tx` which is an index for the whole buffer, not the split buffer `after_rx`. Also add more rigorous no-panic proofs. Fixes: 75f6b1de8133 ("gpu: nova-core: gsp: Add GSP command queue bindings and handling") Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Reviewed-by: Gary Guo <gary@garyguo.net> Link: https://patch.msgid.link/20260129-nova-core-cmdq1-v3-5-2ede85493a27@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: gsp: fix improper handling of empty slot in cmdqEliot Courtney1-14/+20
The current code hands out buffers that go all the way up to and including `rx - 1`, but we need to maintain an empty slot to prevent the ring buffer from wrapping around into having 'tx == rx', which means empty. Also add more rigorous no-panic proofs. Fixes: 75f6b1de8133 ("gpu: nova-core: gsp: Add GSP command queue bindings and handling") Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Reviewed-by: Gary Guo <gary@garyguo.net> Link: https://patch.msgid.link/20260129-nova-core-cmdq1-v3-4-2ede85493a27@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: gsp: use empty slices instead of [0..0] rangesEliot Courtney1-4/+4
The current code unnecessarily uses, for example, &before_rx[0..0] to return an empty slice. Instead, just use an empty slice. Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Reviewed-by: Gary Guo <gary@garyguo.net> Link: https://patch.msgid.link/20260129-nova-core-cmdq1-v3-3-2ede85493a27@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: gsp: clarify comments about invariants and pointer rolesEliot Courtney1-8/+10
Disambiguate a few things in comments in cmdq.rs. Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Reviewed-by: Gary Guo <gary@garyguo.net> Link: https://patch.msgid.link/20260129-nova-core-cmdq1-v3-2-2ede85493a27@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: gsp: fix incorrect advancing of write pointerEliot Courtney1-1/+1
We should modulo not bitwise-and here. The current code could, for example, set wptr to MSGQ_NUM_PAGES which is not valid. Fixes: 75f6b1de8133 ("gpu: nova-core: gsp: Add GSP command queue bindings and handling") Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Reviewed-by: Gary Guo <gary@garyguo.net> Link: https://patch.msgid.link/20260129-nova-core-cmdq1-v3-1-2ede85493a27@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: use checked arithmetic in RISC-V firmware parsingJoel Fernandes1-2/+4
Use checked_add() when computing offsets from firmware-provided values in the RISC-V firmware parsing code. These values come from the BinHdr structure parsed from the firmware file header. Reviewed-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: Gary Guo <gary@garyguo.net> Link: https://patch.msgid.link/20260126202305.2526618-6-joelagnelf@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: use checked arithmetic in BinFirmware::dataJoel Fernandes1-1/+2
Use checked_add() when computing the firmware data end offset in the BinFirmware::data() method. The data_offset and data_size fields come from the BinHdr structure parsed from the firmware file header. Reviewed-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: Gary Guo <gary@garyguo.net> Link: https://patch.msgid.link/20260126202305.2526618-5-joelagnelf@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: use checked arithmetic in frombytes_at helperJoel Fernandes1-1/+2
Use checked_add() when computing the end offset in the frombytes_at() helper function. This function is called with firmware-provided offsets. Reviewed-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: Gary Guo <gary@garyguo.net> Link: https://patch.msgid.link/20260126202305.2526618-4-joelagnelf@nvidia.com Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: use checked arithmetic in Booter signature parsingJoel Fernandes1-5/+12
Use checked_add() when computing signature offsets from firmware- provided values in signatures_iter(). Without checked arithmetic, overflow could wrap to a small plausible offset that points to entirely wrong data. Reviewed-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: Gary Guo <gary@garyguo.net> Link: https://patch.msgid.link/20260126202305.2526618-3-joelagnelf@nvidia.com [acourbot@nvidia.com: remove obvious computation comments.] Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-25gpu: nova-core: use checked arithmetic in FWSEC firmware parsingJoel Fernandes1-27/+37
Use checked_add() and checked_mul() when computing offsets from firmware-provided values in new_fwsec(). Without checked arithmetic, corrupt firmware could cause integer overflow. The danger is not just wrapping to a huge value, but potentially wrapping to a small plausible offset that passes validation yet accesses entirely wrong data, causing silent corruption or security issues. Reviewed-by: Zhi Wang <zhiw@nvidia.com> Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: Gary Guo <gary@garyguo.net> Link: https://patch.msgid.link/20260126202305.2526618-2-joelagnelf@nvidia.com [acourbot@nvidia.com: rewrap commit message to make checkpatch happy.] [acourbot@nvidia.com: add missing empty lines after new code blocks.] [acourbot@nvidia.com: move SAFETY comments to the unsafe statement they describe.] [acourbot@nvidia.com: remove obvious computation comments and use `CALC:` for the remaining ones.] Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2026-02-24drm/xe/xe2_hpg: Drop invalid workaround Wa_15010599737Matt Roper1-4/+1
Wa_15010599737 was a workaround originally proposed (and ultimately rejected) for DG2-G10. There's no record of it ever being relevant or even considered for any other platforms. The specific bit this workaround was setting is documented as "This bit should be set to 1 for the DX9 API and 0 for all other APIs" which means that it should almost always be left at the default value of 0 on Linux. The register itself is directly accessible from userspace, so in the special cases where it might be relevant (e.g., Wine/Proton running Windows DX9 apps), the userspace drivers already have the ability to change the setting without involvement of the kernel. Fixes: 7f3ee7d88058 ("drm/xe/xe2hpg: Add initial GT workarounds") Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com> Link: https://patch.msgid.link/20260223-forupstream-wa_cleanup-v3-2-7f201eb2f172@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2026-02-24drm/xe: Consolidate workaround entries for Wa_18041344222Matt Roper1-18/+6
Wa_18041344222 applies to all graphics versions from 20.01 through 30.00 (inclusive). Consolidate the RTP entries into a single range-based entry. v2: - Drop the FUNC(xe_rtp_match_not_sriov_vf) to align with commit a800b95c2498 ("drm/xe/xe2hpg: Remove SRIOV VF check for Wa_18041344222") and commit 0ffe9dcf260b ("drm/xe/xe3: Remove SRIOV VF check for Wa_18041344222") which just landed. (Shuicheng) Cc: Shuicheng Lin <shuicheng.lin@intel.com> Reviewed-by: Shuicheng Lin <shuicheng.lin@intel.com> Link: https://patch.msgid.link/20260223-forupstream-wa_cleanup-v3-1-7f201eb2f172@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2026-02-25drm/sun4i: fix kernel-doc warnings in sunxi_engine.hRandy Dunlap1-2/+5
Correct the kernel-doc notation, add a missing struct member comment, and add a missing "Returns:" function comment to eliminate kernel-doc warnings: Warning: drivers/gpu/drm/sun4i/sunxi_engine.h:116 Incorrect use of kernel-doc format: * @mode_set Warning: drivers/gpu/drm/sun4i/sunxi_engine.h:125 struct member 'mode_set' not described in 'sunxi_engine_ops' Warning: drivers/gpu/drm/sun4i/sunxi_engine.h:144 struct member 'list' not described in 'sunxi_engine' Warning: drivers/gpu/drm/sun4i/sunxi_engine.h:168 No description found for return value of 'sunxi_engine_layers_init' Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reviewed-by: Chen-Yu Tsai <wens@kernel.org> Link: https://patch.msgid.link/20260219215524.468142-1-rdunlap@infradead.org Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2026-02-25drm/sun4i: backend: fix error pointer dereferenceEthan Tidmore1-0/+3
The function drm_atomic_get_plane_state() can return an error pointer and is not checked for it. Add error pointer check. Detected by Smatch: drivers/gpu/drm/sun4i/sun4i_backend.c:496 sun4i_backend_atomic_check() error: 'plane_state' dereferencing possible ERR_PTR() Fixes: 96180dde23b79 ("drm/sun4i: backend: Add a custom atomic_check for the frontend") Signed-off-by: Ethan Tidmore <ethantidmore06@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@kernel.org> Link: https://patch.msgid.link/20260217014801.60760-1-ethantidmore06@gmail.com Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2026-02-25drm/sun4i: mixer: Fix layer init codeJernej Skrabec1-1/+1
Code refactoring dropped extra NULL sentinel entry at the end of the drm planes array. Add it back. Reported-by: Chen-Yu Tsai <wens@kernel.org> Closes: https://lore.kernel.org/linux-sunxi/CAGb2v65wY2pF6sR+0JgnpLa4ysvjght5hAKDa1RUyo=zEKXreg@mail.gmail.com/ Fixes: 4fa45b04a47d ("drm/sun4i: layer: move num of planes calc out of layer code") Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@kernel.org> Link: https://patch.msgid.link/20260218183454.7881-1-jernej.skrabec@gmail.com [wens@kernel.org: Fix "Fixes" commit hash] Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2026-02-24drm/i915/selftests: Fix build after dma-fence locking reworkMatthew Brost1-2/+2
The i915_active selftest no longer builds after the dma-fence locking rework because it directly accessed the fence’s spinlock. The helper dma_fence_spinlock() must now be used to obtain the spinlock. Update the selftest to use dma_fence_spinlock() accordingly. Fixes: 1f32f310a13c ("dma-buf: inline spinlock for fence protection v5") Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patch.msgid.link/20260223172553.1663749-1-matthew.brost@intel.com
2026-02-24drm/gpusvm: Fix drm_gpusvm_pages_valid_unlocked() kernel-docMatthew Brost1-5/+5
The kernel-doc for drm_gpusvm_pages_valid_unlocked() was stale and still referenced old range-based arguments and naming. Update the documentation to match the current function arguments and signature. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patch.msgid.link/20260219205029.1011336-1-matthew.brost@intel.com
2026-02-24gpu: nova-core: fix aux device registration for multi-GPU systemsJohn Hubbard1-2/+13
The auxiliary device registration was using a hardcoded ID of 0, which caused probe() to fail on multi-GPU systems with: sysfs: cannot create duplicate filename '/bus/auxiliary/devices/NovaCore.nova-drm.0' Fix this by using an atomic counter to generate unique IDs for each GPU's aux device registration. The TODO item to eventually use XArray for recycling aux device IDs is retained, but for now, this works very nicely. This has the side effect of making debugfs[1] work on multi-GPU systems. [1] https://lore.kernel.org/20260203224757.871729-1-ttabi@nvidia.com Reviewed-by: Gary Guo <gary@garyguo.net> Signed-off-by: John Hubbard <jhubbard@nvidia.com> Link: https://patch.msgid.link/20260221020952.412352-2-jhubbard@nvidia.com [ Use LKMM atomics; inline and slightly reword TODO comment. - Danilo ] Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-02-24drm/xe/uapi: Introduce a flag to disallow vm overcommit in fault modeThomas Hellström3-2/+17
Some compute applications may try to allocate device memory to probe how much device memory is actually available, assuming that the application will be the only one running on the particular GPU. That strategy fails in fault mode since it allows VM overcommit. While this could be resolved in user-space it's further complicated by cgroups potentially restricting the amount of memory available to the application. Introduce a vm create flag, DRM_XE_VM_CREATE_NO_VM_OVERCOMMIT, that allows fault mode to mimic the behaviour of !fault mode WRT this. It blocks evicting same vm bos during VM_BIND processing. However, it does *not* block evicting same-vm bos during pagefault processing, preferring eviction rather than VM banning in OOM situations. Cc: John Falkowski <john.falkowski@intel.com> Cc: Michal Mrozek <michal.mrozek@intel.com> Cc: Matthew Brost <matthew.brost@intel.com> Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260204153320.17989-1-thomas.hellstrom@linux.intel.com
2026-02-24gpu: nova-core: remove redundant `.as_ref()` for `dev_*` printGary Guo3-28/+10
This is now handled by the macro itself. Signed-off-by: Gary Guo <gary@garyguo.net> Link: https://patch.msgid.link/20260123175854.176735-7-gary@kernel.org Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-02-24drm/nouveau: Add DRM_IOCTL_NOUVEAU_GET_ZCULL_INFOMel Henning3-0/+31
Add kernel-side support for using the zcull hardware in nvidia gpus. zcull aims to improve memory bandwidth by using an early approximate depth test, similar to hierarchical Z on an AMD card. Add a new ioctl that exposes zcull information that has been read from the hardware. Userspace uses each of these parameters either in a heuristic for determining zcull region parameters or in the calculation of a buffer size. It appears the hardware hasn't changed its structure for these values since FERMI_C (circa 2011), so the assumption is that it won't change on us too quickly, and is therefore reasonable to include in UAPI. This bypasses the nvif layer and instead accesses nvkm_gr directly, which mirrors existing usage of nvkm_gr_units(). There is no nvif object for nvkm_gr yet, and adding one is not trivial. Signed-off-by: Mel Henning <mhenning@darkrefraction.com> Link: https://patch.msgid.link/20260219-zcull3-v3-2-dbe6a716f104@darkrefraction.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-02-24drm/nouveau: Fetch zcull info from deviceMel Henning5-6/+77
This information will be exposed to userspace in the following commit. Add struct nvkm_gr_zcull_info, which serves as abstraction layer between the corresponding uAPI (added in a subsequent patch) and the firmware structure. Extend the existing get_ctxbufs callback to also fill in zcull info. ctxsw_size and ctxsw_align come from NV2080_CTRL_CMD_INTERNAL_STATIC_KGR_GET_CONTEXT_BUFFERS_INFO, which is already called by r570_gr_get_ctxbufs, while the rest of the zcull info comes from NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_ENGINE_ID_GRAPHICS_ZCULL. Adding a separate callback for zcull info would require us to either: 1) Call GET_CONTEXT_BUFFERS_INFO twice, once for each callback. This is a little slower and more verbose than calling it once. or 2) Fill out zcull_info partially in r570_gr_get_ctxbufs and partially in the new callback. Since we fill out only some of the info in each we now need to handle edge cases where one function is called but not the other as well as them being called in an arbitrary order. Because of this, it's simplest to combine them in a single call (get_ctxbufs_and_zcull_info), which avoids repeated rpc calls to the gpu without the complexity of handling partially complete states. Signed-off-by: Mel Henning <mhenning@darkrefraction.com> Link: https://patch.msgid.link/20260219-zcull3-v3-1-dbe6a716f104@darkrefraction.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-02-24drm/msm/dsi: fix hdisplay calculation when programming dsi registersPengyu Luo1-6/+8
Recently, the hdisplay calculation is working for 3:1 compressed ratio only. If we have a video panel with DSC BPP = 8, and BPC = 10, we still use the default bits_per_pclk = 24, then we get the wrong hdisplay. We can draw the conclusion by cross-comparing the calculation with the calculation in dsi_adjust_pclk_for_compression(). Since CMD mode does not use this, we can remove !(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO) safely. Fixes: efcbd6f9cdeb ("drm/msm/dsi: Enable widebus for DSI") Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/704822/ Link: https://lore.kernel.org/r/20260214105145.105308-1-mitltlatltl@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-02-24drm/tyr: Use vertical style for importsDeborah Brouwer5-55/+86
Currently Tyr uses rustfmt style for imports, but the kernel uses a vertical layout that makes it easier to resolve conflicts and rebase. Import guidelines are documented here: https://docs.kernel.org/rust/coding-guidelines.html#imports Change all of Tyr's imports to use the vertical layout. This will ease the introduction of additional Tyr patches upstream. There should be no functional changes in this patch. Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Deborah Brouwer <deborah.brouwer@collabora.com> Link: https://patch.msgid.link/20260223203833.207955-1-deborah.brouwer@collabora.com Signed-off-by: Alice Ryhl <aliceryhl@google.com>
2026-02-24drm/tyr: gpu: fix GpuInfo::log model/version decodingOnur Özkan1-11/+9
GpuInfo::log() was decoding GPU_ID like this: major = (self.gpu_id >> 16) & 0xff; minor = (self.gpu_id >> 8) & 0xff; status = self.gpu_id & 0xff; That does not match the Mali GPU_ID layout and mixes unrelated fields. Due to that, model detection becomes `mali-unknown` on rk3588s which is wrong. We can already get all the version information with a single GpuId::from call (less code and cleaner), so this patch uses it. Also renamed `GpuModels` fields from `major/minor` to `arch_major/prod_major` to reflect their real meaning. This change was tested on Orange Pi 5 (rk3588s) board and the results are as follows: Before this change: $ dmesg | grep 'tyr' [ 19.698338] tyr fb000000.gpu: mali-unknown id 0xa867 major 0x67 minor 0x0 status 0x5 [ 19.699050] tyr fb000000.gpu: Features: L2:0x7120306 Tiler:0x809 Mem:0x301 MMU:0x2830 AS:0xff [ 19.699817] tyr fb000000.gpu: shader_present=0x0000000000050005 l2_present=0x0000000000000001 tiler_present=0x0000000000000001 [ 19.702493] tyr fb000000.gpu: Tyr initialized correctly. After this change: $ dmesg | grep 'tyr' [ 19.591692] tyr fb000000.gpu: mali-g610 id 0xa867 major 0x0 minor 0x0 status 0x5 [ 19.592374] tyr fb000000.gpu: Features: L2:0x7120306 Tiler:0x809 Mem:0x301 MMU:0x2830 AS:0xff [ 19.593141] tyr fb000000.gpu: shader_present=0x0000000000050005 l2_present=0x0000000000000001 tiler_present=0x0000000000000001 [ 19.595831] tyr fb000000.gpu: Tyr initialized correctly. Signed-off-by: Onur Özkan <work@onurozkan.dev> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Tested-by: Alvin Sun <sk.alvin.x@gmail.com> Link: https://patch.msgid.link/20260210183812.261142-1-work@onurozkan.dev Signed-off-by: Alice Ryhl <aliceryhl@google.com>
2026-02-24gpu: Fix uninitialized buddy for built-in driversKoen Koning1-1/+2
Move buddy to the start of the link order, so its __init runs before any other built-in drivers that may depend on it. Otherwise, a built-in driver that tries to use the buddy allocator will run into a kernel NULL pointer dereference because slab_blocks is uninitialized. Specifically, this fixes drm/xe (as built-in) running into a kernel panic during boot, because it uses buddy during device probe. Fixes: ba110db8e1bc ("gpu: Move DRM buddy allocator one level up (part two)") Cc: Joel Fernandes <joelagnelf@nvidia.com> Cc: Dave Airlie <airlied@redhat.com> Cc: intel-xe@lists.freedesktop.org Reviewed-by: Dave Airlie <airlied@redhat.com> Tested-by: Peter Senna Tschudin <peter.senna@linux.intel.com> Signed-off-by: Koen Koning <koen.koning@linux.intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patch.msgid.link/20260213152047.179628-1-koen.koning@linux.intel.com
2026-02-24drm/i915/lt_phy_regs: Add SoC/OS turnaround timeArun R Murthy1-4/+4
On top the timeouts mentioned in the spec which includes only the PHY timeouts include the SoC and the OS turnaround time. The overhead value is based on the stress test results with multiple available panels. Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patch.msgid.link/20260216-timeout-v3-2-055522c22560@intel.com
2026-02-24drm/i915/cx0_phy_regs: Include SoC and OS turnaround timeArun R Murthy1-2/+2
The port refclk enable timeout and the soc ready timeout value mentioned in the spec is the PHY timings and doesn't include the turnaround time from the SoC or OS. So add an overhead timeout value on top of the recommended timeouts from the PHY spec. The overhead value is based on the stress test results with multiple available panels. Reported-by: Cole Leavitt <cole@unwrap.rs> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14713 Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patch.msgid.link/20260216-timeout-v3-1-055522c22560@intel.com
2026-02-23drm/xe: Consolidate workaround entries for Wa_14023061436Matt Roper1-3/+1
Wa_14023061436 applies to all graphics versions from 30.00 through 30.05 (inclusive) since there is currently no IP that uses version 30.02. Consolidate the RTP rules into a single range. Reviewed-by: Shuicheng Lin <shuicheng.lin@intel.com> Link: https://patch.msgid.link/20260220-forupstream-wa_cleanup-v2-23-b12005a05af6@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2026-02-23drm/xe/wa_oob: Consolidate some OOB rulesMatt Roper1-23/+8
Given the new policy of allowing graphics/media IP ranges to extend over unused IP versions, we can consolidate some of the OOB workaround rules and simplify the table. If new IP variants eventually show up that use these unused versions (e.g., media version 30.01, graphics versions 20.03 / 30.02, etc.), and if an existing workaround does not extend to that new intermediate version, the ranges will be split back apart as part of the enablement work for that new IP version. Reviewed-by: Shuicheng Lin <shuicheng.lin@intel.com> Link: https://patch.msgid.link/20260220-forupstream-wa_cleanup-v2-22-b12005a05af6@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>