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2020-06-01Merge tag 'docs-5.8' of git://git.lwn.net/linuxLinus Torvalds1-1/+1
2020-05-15coresight: cti: remove incorrect NULL return checkCalvin Johnson1-2/+2
2020-04-20docs: fix broken references to text filesMauro Carvalho Chehab1-1/+1
2020-03-24intel_th: msu: Make stopping the trace optionalAlexander Shishkin1-1/+37
2020-03-23Merge 5.6-rc7 into char-misc-nextGreg Kroah-Hartman3-9/+15
2020-03-21coresight: cti: Add connection information to sysfsMike Leach3-3/+346
2020-03-21coresight: cti: Enable CTI associated with devicesMike Leach4-5/+204
2020-03-21coresight: cti: Add device tree support for custom CTIMike Leach2-4/+241
2020-03-21coresight: cti: Add device tree support for v8 arch CTIMike Leach4-9/+230
2020-03-21coresight: cti: Add sysfs trigger / channel programming APIMike Leach3-0/+551
2020-03-21coresight: cti: Add sysfs access to program function registersMike Leach4-0/+397
2020-03-21coresight: cti: Add sysfs coresight mgmt register accessMike Leach2-0/+54
2020-03-21coresight: cti: Initial CoreSight CTI DriverMike Leach7-0/+786
2020-03-18intel_th: pci: Add Elkhart Lake CPU supportAlexander Shishkin1-0/+5
2020-03-18intel_th: Fix user-visible error codesAlexander Shishkin1-3/+3
2020-03-18intel_th: msu: Fix the unexpected state warningAlexander Shishkin1-3/+4
2020-03-18stm class: sys-t: Fix the use of time_after()Alexander Shishkin1-3/+3
2020-03-18intel_th: Disallow multi mode on devices where it's brokenAlexander Shishkin3-4/+17
2020-01-14coresight: etm4x: Fix unused function warningArnd Bergmann1-7/+6
2019-12-17intel_th: msu: Fix window switching without windowsAlexander Shishkin1-5/+9
2019-12-17intel_th: Fix freeing IRQsAlexander Shishkin2-3/+6
2019-12-17intel_th: pci: Add Elkhart Lake SOC supportAlexander Shishkin1-0/+5
2019-12-17intel_th: pci: Add Comet Lake PCH-V supportAlexander Shishkin1-0/+5
2019-12-01Merge tag 'compat-ioctl-5.5' of git://git.kernel.org:/pub/scm/linux/kernel/git/arnd/playgroundLinus Torvalds1-11/+1
2019-11-20intel_th: pci: Add Tiger Lake CPU supportAlexander Shishkin1-0/+5
2019-11-20intel_th: pci: Add Ice Lake CPU supportAlexander Shishkin1-0/+5
2019-11-20intel_th: Fix a double put_device() in error pathAlexander Shishkin1-6/+2
2019-11-19coresight: replicator: Fix missing spin_lock_init()Wei Yongjun1-0/+1
2019-11-19coresight: funnel: Fix missing spin_lock_init()Wei Yongjun1-0/+1
2019-11-14stm class: Lose the protocol driver when dropping its referenceAlexander Shishkin1-0/+4
2019-11-11Merge 5.4-rc7 into char-misc-nextGreg Kroah-Hartman3-3/+21
2019-11-04coresight: etm4x: Fix BMVAL misuseRikard Falkeborn1-1/+1
2019-11-04coresight: Serialize enabling/disabling a link device.Yabin Cui4-52/+90
2019-11-04coresight: Add explicit architecture dependencyMark Brown1-0/+1
2019-11-04coresight: etm4x: Add missing single-shot control API to sysfsMike Leach3-1/+149
2019-11-04coresight: etm4x: Add view comparator settings API to sysfs.Mike Leach1-0/+52
2019-11-04coresight: etm4x: Improve usability of sysfs - CID and VMID masks.Mike Leach1-2/+8
2019-11-04coresight: etm4x: Improve usability of sysfs - include/exclude addr.Mike Leach1-5/+9
2019-11-04coresight: etm4x: Fix issues with start-stop logic.Mike Leach2-4/+36
2019-11-04coresight: etm4x: Add missing API to set EL match on address filtersMike Leach1-0/+42
2019-11-04coresight: etm4x: Fix input validation for sysfs.Mike Leach1-8/+13
2019-11-04coresight: etm4x: Fixes for ETM v4.4 architecture updates.Mike Leach3-11/+21
2019-11-04coresight: etm4x: Add support for ThunderX2Tanmay Vilas Kumar Jagdale1-0/+1
2019-11-04coresight: etm4x: Save/restore state across CPU low power statesAndrew Murray3-0/+388
2019-11-04intel_th: pci: Add Jasper Lake PCH supportAlexander Shishkin1-0/+5
2019-11-04intel_th: pci: Add Comet Lake PCH supportAlexander Shishkin1-0/+5
2019-11-04intel_th: msu: Fix possible memory leak in mode_store()Wei Yongjun1-1/+3
2019-11-04intel_th: msu: Fix overflow in shift of an unsigned intColin Ian King1-1/+1
2019-11-04intel_th: msu: Fix missing allocation failure check on a kstrndupColin Ian King1-0/+3
2019-11-04intel_th: msu: Fix an uninitialized mutexAlexander Shishkin1-1/+1
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